Table of Contents
Advertisement
5.2 Summary of Notes by Function
Here, the cautionary notes are summed up by function category. Keep these notes well in mind when
programming.
Memory and stack
(1) Memory is not implemented in unused areas within the memory map. Further, some non-implemen-
tation areas and unused (access prohibition) areas exist in the peripheral I/O area. If the program that
accesses these areas is generated, its operation cannot be guaranteed. Refer to the I/O memory maps
shown in Table 4.1.1 for the peripheral I/O area.
(2) Part of the RAM area is used as a stack area for subroutine call and register evacuation, so pay attention
not to overlap the data area and stack area.
(3) The S1C63000 core CPU handles the stack using the stack pointer for 4-bit data (SP2) and the stack
pointer for 16-bit data (SP1).
16-bit data are accessed in stack handling by SP1, therefore, this stack area should be allocated to the
area where 4-bit/16-bit access is possible (0100H to 01FFH). The stack pointers SP1 and SP2 change cy-
clically within their respective range: the range of SP1 is 0000H to 07FFH and the range of SP2 is 0000H
to 00FFH. Therefore, pay attention to the SP1 value because it may be set to 0200H or more exceeding
the 4-bit/16-bit accessible range in the S1C63616 or it may be set to 00FFH or less. Memory accesses ex-
cept for stack operations by SP1 are 4-bit data access. After initial reset, all the interrupts including NMI
are masked until both the stack pointers SP1 and SP2 are set by software. Further, if either SP1 or SP2 is
re-set when both are set already, the interrupts including NMI are masked again until the other is re-set.
Therefore, the settings of SP1 and SP2 must be done as a pair.
Power control
(1) When the power supply voltage booster/halver is turned on, the V
msec to stabilize. Do not switch the power source for the voltage regulator (LCD system voltage regula-
tor) to V
until the stabilization time has elapsed.
D2
(2) HLON is prohibited from use, as it may cause malfunctions. Always be sure to set to "0".
(3) Do not set DBON to "1" (boost mode) and VCSEL to "1" (driving with V
exceeds 2.5 V, as it may cause damage of the IC.
(4) Current consumption increases in heavy load protection mode, therefore do not set heavy load protec-
tion mode with software if unnecessary.
Watchdog timer
When the watchdog timer is being used, the software must reset it within 3-second cycles. Because the
watchdog timer is set in operation state by initial reset, set the watchdog timer to disabled state (not
used) before generating an interrupt (NMI) if it is not used.
Oscillation circuit
(1) When the high speed CPU operation is not necessary, you should operate the peripheral circuits accord-
ing to the setting outline indicate below.
• CPU operating clock:
• OSC3 oscillation circuit: Off
(When the OSC3 clock is not necessary for some peripheral circuits.)
(2) Since 1 msec to several tens of msec are necessary for the oscillation to stabilize after turning the OSC3
oscillation circuit on. Consequently, you should switch the CPU operating clock (OSC1 → OSC3) after
allowing for a sufficient waiting time once the OSC3 oscillation goes on. (The oscillation start time will
vary somewhat depending on the oscillator and on the externally attached parts. Refer to the oscillation
start time example indicated in Chapter 7, "Electrical Characteristics".)
(3) When switching the clock from OSC3 to OSC1, be sure to switch OSC3 oscillation off with separate
instructions. Using a single instruction to process simultaneously can cause a malfunction of the CPU.
OSC1
SIC63616-(Rev. 1.0) NO. P174
output voltage requires about 1
D2
) if the supply voltage V
D2
DD
3240-0412
Advertisement
Table of Contents
