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4.7 Clock Timer
4.7.1 Configuration of clock timer
The S1C63616 has a built-in clock timer that uses OSC1 (crystal oscillator) as the source oscillator. The clock
timer is configured of an 8-bit binary counter that serves as the input clock, f
the prescaler. Timer data (128–16 Hz and 8–1 Hz) can be read out by the software.
Figure 4.7.1.1 is the block diagram for the clock timer.
OSC1
oscillation circuit
(f
)
OSC1
Clock enable signal
Clock timer RUN/STOP signal
Ordinarily, this clock timer is used for all types of timing functions such as clocks.
4.7.2 Controlling clock manager
The clock manager generates the clock timer operating clock by dividing the OSC1 clock by 128. Before the
clock timer can be run, write "1" to the RTCKE register to supply the operating clock to the clock timer.
If it is not necessary to run the clock timer, stop the clock supply by setting RTCKE to "0" to reduce current
consumption.
4.7.3 Data reading and hold function
The 8 bits timer data are allocated to the address FF41H and FF42H.
<FF41H>
D0: TM0 = 128 Hz
<FF42H>
D0: TM4 = 8 Hz
Since two addresses are allocated for the clock timer data, a carry is generated from the low-order data (TM0
–TM3: 128–16 Hz) to the high-order data (TM4–TM7: 8–1 Hz) during counting. If this carry is generated
between readings of the low-order data and the high-order data, the combined data does not represent the
correct value (if a carry occurs after the low-order data is read as FFH, the incremented (+1) value is read as
the high-order data). To avoid this problem, the clock timer is designed to latch the high-order data at the
time the low-order data is read. The latched high-order data will be maintained until the next reading of the
low-order data.
Note: The latched value, not the current value, is always read as the high-order data. Therefore, be sure to
read the low-order data first.
Data bus
f
/128
OSC1
Clock
manager
Clock timer reset signal
Fig. 4.7.1.1 Block diagram for the clock timer
Table 4.7.2.1 Controlling clock timer operating clock
RTCKE
Clock timer operating clock
1
0
D1: TM1 = 64 Hz
D1: TM5 = 4 Hz
Clock timer
128 Hz–16 Hz
8 Hz–1 Hz
128 Hz, 64 Hz, 32 Hz, 16 Hz,
8 Hz, 4 Hz, 2 Hz, 1 Hz
Interrupt
control
f
/ 128 (256 Hz)
OSC1
Off
D2: TM2 = 32 Hz
D2: TM6 = 2 Hz
SIC63616-(Rev. 1.0) NO. P79
divided clock output from
OSC1
Interrupt
request
D3: TM3 = 16 Hz
D3: TM7 = 1 Hz
3240-0412
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