7.5.3
Internal interfaces
7.5.3.1
Overview of internal interfaces
Interface
PCIe x1
7.5.3.2
PCIe interface
Assignment of the PCIe x1 interface
Pin no.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
SIMATIC IPC227E
Operating Instructions, 11/2016, A5E35782395-AB
Position
Internal
Side B
Name
Description
+12 V
12 V power
+12 V
12 V power
+12 V
12 V power
GND
Ground
SMCLK
SMBUS (System Man-
agement Bus) clock
SMDAT
SMBus (System Man-
agement Bus) data
GND
Ground
+3.3 V
3.3 V power
JTAG1
TRST# (Test Reset)
resets the JTAG interface
3.3 Vaux
3.3 V auxiliary power
WAKE#
Signal for link reactivation PERST#
RSVD
Reserved
GND
Ground
PETp0
Transmitter differential
pair, Lane 0
PETn0
Transmitter differential
pair, Lane 0
GND
Ground
PRSNT2#
Hot-plug presence detect PERn0
GND
Ground
7.5 Hardware descriptions
Connector
Description
PCIe x1 interface
Side A
Name
Description
PRSNT1#
Hot-plug presence detect
+12 V
12 V power
+12 V
12 V power
GND
Ground
JTAG2
TCK (Test Clock), clock
input for JTAG interface
JTAG3
TDI (Test Data Input)
JTAG4
TDO (Test Data Output)
JTAG5
TMS (Test Mode Select)
+3.3 V
3.3 V power
+3.3 V
3.3 V power
Fundamental reset
GND
Ground
REFCLK+
Reference clock (differential
pair)
REFCLK-
Reference clock (differential
pair)
GND
Ground
PERp0
Receiver differential pair,
Lane 0
Receiver differential pair,
Lane 0
GND
Ground
Technical specifications
113