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S1R72U16 Development Support Manual Rev.2.00...
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Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any liability of any kind arising out of any inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there is no representation that this material is applicable to products requiring high level reliability, such as, medical products.
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Scope This document applies to the S1R72U16 IDE device - USB 2.0 host bridge LSI.
IDE: Multi Word DMA (D->H) ......................7 4.1.8 IDE: Multi Word DMA (H->D) ......................8 4.1.9 IDE: Ultra DMA (D->H)........................8 4.1.10 IDE: Ultra DMA (H->D)........................8 4.1.11 IDE: CRC error ..........................8 4.1.12 IDE: INTRQ............................8 USB History Data............................9 4.2.1 USB: VBUS Overcurrent ........................9 EPSON S1R72U16 Development Support Manual (Rev.2.00)
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Main CPU and LSI Connection Verification Method ..............12 4.3.2 USB Device and LSI Connection Verification Method ..............13 4.3.3 Potential Communication Problems with USB Devices ..............15 Appendix A Correspondence between Pins and ATA/ATAPI Standard Signals ......16 EPSON S1R72U16 Development Support Manual (Rev.2.00)
CPU and the LSI, as well as simple debugging using transfer history and error information. The USB logo certification support function is used to switch to the test mode corresponding to the electrical test as part of certification testing. For detailed information, refer to the S1R72U16 Embedded Host Compliance Guide.
Control PC Fig. 2-1 Typical hardware configuration The blocks shown in Fig. 2-1 are as follows: • Board containing S1R72U16 Corresponds to the product (system) board. These functions are controlled by the control PC. • Control PC PC used to control these functions via terminal software using the RS-232 interface function.
Consider the following possible causes if the PLL_Locked pin (Port13) fails to switch to High. • The specified power supply is not provided to the LSI. • The LSI reset pin (XRESET) is still at Low. EPSON S1R72U16 Development Support Manual (Rev.2.00)
Quits the function. 3.2.1 USB Analog Test When key input “1” is received, then the operation menu is displayed and to allow switching to Test mode. For detailed information, refer to S1R72U16 Embedded Host Compliance Guide. 3.2.2 Diagnostic When key input “2” is received, then the operation menu is displayed and to start the history display function.
Table 3-2. History data recording resumes after the previous data has been cleared. 3.3.3 Quit When key input “q” is received, then this quits the history display function and returns to the main menu. EPSON S1R72U16 Development Support Manual (Rev.2.00)
This history entry is recorded when a hardware reset is detected. If this history entry does not appear even after the main CPU has issued a hardware reset, there may be a problem with signal quality or in the signal connection shown below. • RESET- EPSON S1R72U16 Development Support Manual (Rev.2.00)
• DIOW-, DIOR-, DMARQ, DMACK - If data is incorrect, there may be a problem with signal quality or in the signal connections shown below. • DD0 to DD15 EPSON S1R72U16 Development Support Manual (Rev.2.00)
Note that this history entry is not recorded when the following commands, for which the ATA/ATAPI standards specify INTRQ is not to be asserted, terminate normally. IDENTIFY DEVICE IDENTIFY PACKET DEVICE READ SECTOR (S) READ SECTOR (S) EXT READ MULTIPLE READ MULTIPLE EXT EPSON S1R72U16 Development Support Manual (Rev.2.00)
USB: HS device This history entry is recorded when an HS (High Speed) device is connected. HS devices include USB hubs recognized as HS. This history entry is not recorded if connected via a USB hub. EPSON S1R72U16 Development Support Manual (Rev.2.00)
This history entry is recorded on receiving a command status reception CSW as defined for Mass Storage Class. This is the status for commands issued using CBW and indicates that the protocol is complete. EPSON S1R72U16 Development Support Manual (Rev.2.00)
This history entry is recorded when the LSI requests the clearing of (issuing request to clear) the STALL after returnning STALL from a device. 4.2.15 USB: Mass Storage Reset This history entry is recorded when Mass Storage Reset is issued to a device. EPSON S1R72U16 Development Support Manual (Rev.2.00)
This enables evaluation of the CS0-, CS1-, DA0 to DA2, DIOW-, DIOR-, and INTRQ signals. Compare the data written by the WRITE SECTOR(S) command against the data read by the READ SECTOR(S) command. Confirm that they match. This enables evaluation of the DD0 to DD15 signals. EPSON S1R72U16 Development Support Manual (Rev.2.00)
• Checking the initial state of the VBUS supply control circuit Confirm that “USB: VBUS overcurrent” does not appear in the history without connecting a USB device. * Otherwise, there may be a problem in the VBUS supply control circuit. EPSON S1R72U16 Development Support Manual (Rev.2.00)
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• Confirm that “USB: unsupported device” appears in the history if the USB device connected is an unsupported device. * If not, there may be a problem with signal quality. EPSON S1R72U16 Development Support Manual (Rev.2.00)
1), the USB device involved will be treated as an unsupported device. • “USB: cleared STALL” – “USB: Mass Storage Reset” appear in history. • “USB: phase err” – “USB: Mass Storage Reset” appear in history. EPSON S1R72U16 Development Support Manual (Rev.2.00)
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Revision History Revision History Revision details Date Rev. Page Type Details 05/31/2007 0.10 Newly established 2007/07/01 1.00 Added subclass details to history information precautions. Added DRQ bit conditions to states allowing receipt of commands in Section 4.1.1. Correct Corrected details for Section 4.1.12. Correct Corrected details for Section 4.3.3.