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CHAPTER 9 TIMER/COUNTER FUNCTION (REAL-TIME PULSE UNIT)
(c) Operation in UDC mode A
(i) Interval operation
The operations at the count clock following match of the TM1n count value and the CM1n0 set value
are as follows.
• In case of up count operation: TM1n is cleared (0000H) and the INTCM1n0 interrupt is generated.
• In case of down count operation: The TM1n count value is decremented (−1) and the INTCM1n0
interrupt is generated.
Remark
The interval operation can be combined with the transfer operation.
(ii) Transfer operation
The operations at the next count clock after the count value of TM1n becomes 0000H during TM1n
count down operation are as follows.
• In case of down count operation: The data held in CM1n0 is transferred.
• In case of up count operation: The TM1n count value is incremented (+1).
Remarks 1. Transfer enable/disable can be set with the RLEN bit of the TMC10 register.
2. The transfer operation can be combined with the interval operation.
Figure 9-54. Example of TM1n Operation When Interval Operation and Transfer Operation Are Combined
Remark n = 0, 1
CM1n0 set value
TM1n count value
0000H
TM1n and CM1n0 match
& timer clear
Up count
User's Manual U14492EJ3V0UD
TM1n underflow
& CM1n0 data transfer
Down count
327
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