Table of Contents
Advertisement
CHAPTER 9 TIMER/COUNTER FUNCTION (REAL-TIME PULSE UNIT)
(4) Compare operation
The TM3 register has two capture/compare registers. These are the CC30 register and the CC31 register. A
capture operation or a compare operation is performed according to the settings of both the CMS1 and CMS0
bits of the TMC31 register. If 1 is set in the CMS1 and CMS0 bits of the TMC31 register, the register
operates as a compare register.
A compare operation that compares the value that was set in the compare register and the TM3 count value
is performed.
If the TM3 count value matches the value of the compare register, which had been set in advance, a match
signal is sent to the output controller. The match signal causes the timer output pin (TO3) to change and an
interrupt request signal (INTCC30, INTCC31) to be generated at the same time.
If the CC30 or CC31 register is set to 0000H, the 0000H after the TM3 register counts up from FFFFH to
0000H is judged as a match. In this case, the value of the TM3 register is cleared to 0 at the next count
timing, but 0000H is not judged as a match at that time. 0000H when the TM3 register begins counting is not
judged as a match either.
If match clearing is enabled (CCLR bit = 1) for the CC30 register, the TM3 register is cleared when a match
with the TM3 register occurs during a compare operation.
Figure 9-88. Compare Operation Example (1/2)
(a) If CCLR bit = 1 and CC30 is value other than 0000H
Count up
TM3
n−1
n
0000H
0001H
Compare register
n
(CC30)
Match detection
(INTCC30)
Remarks 1. The match is detected immediately after the count up, and the match detection signal is
generated.
2. n ≠ 0000H
393
User's Manual U14492EJ3V0UD
Advertisement
Table of Contents
