Sanyo PLC-XL50A Service Manual page 55
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Also See for PLC-XL50A:
- Owner's manual (72 pages) ,
- Manual (51 pages) ,
- Quick reference manual (1 page)
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Group/
Item Name
Item
3 Shipping Setting
4 CABLE SW
5 PW Debug Command Enable
6 Device Refresh Disable
7 Device Access Disable
30 Lamp life test enable
31 Lmap On time(for life test)
32 Lamp Off time(for life test)
33 Lamp total time(for life test)
40 Lamp PWM PresAv 50Hz
41 Lamp PWM PresAv 60Hz
42 Lamp PWM PresUnlock
43 Lamp PWM PresPcA
44 Lamp PWM PresPcB
45 Lamp PWM PrefAv50Hz
46 Lamp PWM PrefAv60Hz
47 Lamp PWM PrefUnlock
50 Lamp Replacement Display
51 Filter Warning Display
52 Lamp Counter reset Times
53 Filter Counter Reset Time
54 Factory Default Execute Times
56 Menu Position
57 Menu Position
59 Source Search Enable
60 Language Default setting
70 RC Mode
71 Force Model Option
80 Panel life test mode
Group 201 Option (signal)
0 FrameLock Option
1 AV TRUE
2 Field Sense Invert Enable
3
4 Sub Image Enable
6 Zoom Accelerator Enable
7 DZoom Reset by Keystone
8 Stability Count
Sensivity for Signal Lost
9
(HSYNC)
Sensivity for Signal Lost
10
(VSYNC)
11 Keystone Filter Center Value
Group 202 Option (Uniformity Adjust FPGA)
0 FPGA Version
1 ON/OFF
2 MODE
3 SEL
4 HANTEN
5 Red Gain
6 Green Gain
7 Blue Gain
Function
Long Cable
For test purpose
For test purpose
For test purpose
Lamp PWM PRES0 setting (AV 50Hz)
Lamp PWM PRES0 setting (AV 60Hz)
Lamp PWM PRES0 setting
Lamp PWM setting (PC-A)
Lamp PWM setting (PC-B)
Lamp PWM PREF0 setting (AV 50Hz)
Lamp PWM PREF0 setting (AV 60Hz)
Lamp PWM PREF0 setting
Lamp Warning Display On / Off
Filter Warning Display On / Off
Reset Times of Lamp Counter
Reset Times of Filter Counter
Reset times of Fanctory Default
Move menu (X asis)
Move menu (Y asis)
Source Search
Shippig data setting (Language)
Setting RC Mode
Model Option Force Setting
Setting panel life test mode
Change AV Signal True
Count Value of V-missing
Only used this value for No Signal
Judgement(Hz)
Only used this value for No Signal
Judgement(Line)
Reference Value
FPGA Version No. Read only
Setting for Uniformity Adjust ON/OFF
FPGA Table No.
Setting for Uniformity Adjust
calculation
Setting for Adress reverse
Setting for Red Gain
Setting for Ged Gain
Setting for Bed Gain
- 55 -
Initial
Range Note
0
0 - 20
0
0 - 1
0
0 - 1
0
0 - 1
0
0 - 1
0 - 255
0 - 255
0 - 255
0 - 255
0 - 255
0 - 255
0 - 65535
0 - 65535
0 - 65535
1
0 - 1
1
0 - 1
0
0 - 255
0
0 - 255
0
0 - 255
0
0 - 1024
0
0 - 1024
0
0 - 1
-
0
0 - 1
0
0 - 2
1
0 - 1
1
0 - 1
0
0 - 1
0
0 - 1
1
0 - 1
0
0 - 1
0
0 - 1
5
0 - 255
0 -
350
32757
3
0 - 255
16
0 - 30
1
0 - 1
0
0 - 3
1
0 - 1
0
0 - 3
128/92/128/92/128
0 - 255
128/120/120/94/118
0 - 255
128/128/106/128/128
0 - 255
Service Adjustment
Default set when the value is set to 10
0: Disable, 1: Enable
0:Disable (Serial Command Eanble)
1: Enable (PW Debug Mode)
0:Enable, 1:Disable
No last memory
0:Enable (Normal), 1:Disable
No last memory
0:Disable 1:Enable, for safety test only
1: On, 0: Off
1: On, 0: Off
Read only
Read only
Read only
0:Disable 1: Enable
0: Normal RC Mode
1: Promethean RC Mpde
0: Normal 1: Force for XE50 2: Force for
XL50
0: Life test mode 1: Normal
0: FrameLockOFF at PC signal
1: FrameLockON at PC signal and 47Hz
(Vfreq) ~ Panel frequency of input
signal
0:Disable 1: Enable
Reverse Processing of FLDINVSetting
Value
0: Disable - Used FLDINV Setting Value
1: Enable - Used Reversed FLDINV
Setting Value
0:Disable (Service Adjustment Dsiable,
Used all the Center Values
1:Enable (Service Adjustment Enable)
0:Zoom Accelerator OFF,
1:Zoom Accelerator ON
No last memory
0:Enable (Normal), 1:Disable (Dzoo
is not cancelled even if Keystone is
cancelled)
No last memory
0 : OFF, 1 : ON
0 : TBL0, 1 : TBL1, 2 : TBL2
0 : Output=Input x (KH+KV)/2
1 : Output=Input x (KH+KV)
0:Normal, 1: R/L reverse, 2: UP/Down
reverse, 3: R/L, UP/Down reverse
Normal/Red/Blue/Yellow/Green
- Quick Links:
- Indicators and Projector Condition
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