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6.4 SYSTEM MICROCOMPUTER TEST PROGRAM
A
- PCL output
In the normal operation mode (with the detachable panel installed, the ACC switched ON, the standby mode
cancelled), shift the TESTIN (Pin 86) terminal to H.
The clock signal is output from the PCL terminal (Pin 37).
The frequency of the clock signal is 312.500kHz that is one 32nd of the fundamental frequency.
The clock signal should be 312.500kHz ± 13Hz.
If the clock signal is out of the range, the X'tal (X601) should be replaced with new one.
B
C
D
E
F
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DEH-P5750MP/XM/ES
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