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The '/' symbol between signal names indicates that the signals are multiplexed and use the same
pin for all functions.
The following conventions indicate the pin type: 'I' = input-only pins; 'O' = output-only pins; and
'I/O' = bidirectional pins. The pin type is defined relative to the Vesuvius platform.
For a list of pins arranged by pin name, refer to the following table.
Table 2-4
V3-LS Pin Descriptions
Pin Name
ISA Interface
AEN
AS_RTC
ATFLOAT#
BALE
BSERCLKV3
BSER1TO3
BSER3TO1
CLK14MHZ
DACK[7:5, 3:0]#
DRQ[7:5, 3:0]
DS_RTC
Pin No.
Type
43
O
ADDRESS ENABLE: If AEN is driven high, it indicates that the
DMA controller has taken control of the CPU address bus and
the AT bus command lines.
69
O
RTC ADDRESS STROBE: This output should be connected to
the AS_RTC input of an 146818-type or equivalent RTC.
87
I
ATFLOAT#: This pin is multiplexed with IOCHCK#. If the
ATFLOAT# pin function is enabled through register ATCR-2 bit
2. Then driving ATFLOAT# low will float the ISA bus. This
function is to facilitate ISA hot docking design. Docking
operation details: TBD.
3
l/O
BUFFERED ADDRESS LATCH ENABLE: This output is driven
to the AT bus where it indicates the presence of a valid address
on the bus.
48
I
Burst bus clock for serial system and power management bus.
45
I
Serialized system & power management information from V1-
LS to V3-LS.
46
O
Serialized system & power management information from V3-
LS to V1 -GS
86
I
14.318 MHz clock for the 8254 timer.
62, 60,
O
DMA ACKNOWLEDGE [7:5, 3:0]#: DACKn# asserted indicates
58, 56,
the corresponding DMA channel request "n" has been granted.
54, 52,
50
61, 59,
I
DMA REQUEST [7:5, 3:0]#: DRQn asserted indicates a DMA
57, 55,
device is requesting DMA service using Channel "n".
53, 51,
48
68
O
RTC DATA STROBE: This output should be connected to the
DS_RTC input of an 14681 8-type or equivalent RTC.
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