Epson S1C17M24 Manuals

Manuals and User Guides for Epson S1C17M24. We have 1 Epson S1C17M24 manual available for free PDF download: Technical Manual

Epson S1C17M24 Technical Manual (319 pages)

CMOS 16-BIT SINGLE CHIP MICROCONTROLLER

Brand: Epson | Category: Microcontrollers | Size: 7.85 MB

Notational Conventions and Symbols in this Manual
3
Table of Contents
4
1 Overview

14
- Features
  14
- Block Diagram
  16
- Pins
  17
2 Power Supply, Reset, and Clocks

24
- Power Generator (PWG)
  24
  - Overview
    24
  - Pins
    24
  - Regulator Operation Mode
    24
- System Reset Controller (SRC)
  25
  - Overview
    25
  - Input Pin
    25
  - Reset Sources
    26
  - Initialization Conditions (Reset Groups)
    26
- Clock Generator (CLG)
  27
  - Overview
    27
  - Input/Output Pins
    28
  - Clock Sources
    28
  - Operations
    31
- Operating Mode
  35
  - Initial Boot Sequence
    35
  - Transition between Operating Modes
    35
- Interrupts
  37
- Control Registers
  37
3 CPU and Debugger

45
- Overview
  45
- CPU Core
  46
  - CPU Registers
    46
  - Instruction Set
    46
  - Reading PSR
    46
  - I/O Area Reserved for the S1C17 Core
    46
- Debugger
  46
- Control Register
  48
  - MISC PSR Register
    48
  - Debug RAM Base Register
    48
4 Memory and Bus

49
- Overview
  49
- Bus Access Cycle
  49
- Flash Memory
  50
  - Flash Memory Pin
    50
  - Flash Bus Access Cycle Setting
    50
  - Flash Programming
    51
- Ram
  51
- Peripheral Circuit Control Registers
  51
  - System-Protect Function
    56
- Control Registers
  56
5 Interrupt Controller (ITC)

58
- Overview
  58
- Vector Table
  58
  - Vector Table Base Address (TTBR)
    60
- Initialization
  60
- Maskable Interrupt Control and Operations
  60
- Nmi
  61
- Software Interrupts
  61
- Interrupt Processing by the CPU
  62
- Control Registers
  62
6 O Ports (PPORT)

65
- Overview
  65
- I/O Cell Structure and Functions
  66
- Clock Settings
  67
  - PPORT Operating Clock
    67
  - Clock Supply in SLEEP Mode
    68
  - Clock Supply in DEBUG Mode
    68
- Operations
  68
  - Initialization
    68
  - Port Input/Output Control
    69
- Interrupts
  70
- Control Registers
  71
- Control Register and Port Function Configuration of this IC
  76
  - P0 Port Group
    76
  - P1 Port Group
    78
  - P2 Port Group
    81
  - P3 Port Group
    83
  - P4 Port Group
    85
  - Pd Port Group
    87
  - Common Registers between Port Groups
    88
7 Universal Port Multiplexer (UPMUX)

89
8 Watchdog Timer (WDT2)

91
- Overview
  91
- Clock Settings
  91
  - WDT2 Operating Clock
    91
  - Clock Supply in DEBUG Mode
    91
- Operations
  92
  - WDT2 Control
    92
  - Operations in HALT and SLEEP Modes
    93
- Control Registers
  93
9 Real-Time Clock (RTCA)

96
- Overview
  96
- Output Pin and External Connection
  96
  - Output Pin
    96
- Clock Settings
  97
  - RTCA Operating Clock
    97
  - Theoretical Regulation Function
    97
- Operations
  98
  - RTCA Control
    98
  - Real-Time Clock Counter Operations
    99
  - Stopwatch Control
    99
  - Stopwatch Count-Up Pattern
    99
- Interrupts
  100
- Control Registers
  101
  - RTC Control Register
    101
  - RTC Second Alarm Register
    102
  - RTC Hour/Minute Alarm Register
    103
  - RTC Stopwatch Control Register
    103
  - RTC Second/1Hz Register
    104
  - RTC Hour/Minute Register
    105
  - RTC Month/Day Register
    106
  - RTC Year/Week Register
    106
  - RTC Interrupt Flag Register
    107
  - RTC Interrupt Enable Register
    108
10 Supply Voltage Detector (SVD3)

110
- Overview
  110
- Input Pins and External Connection
  111
  - Input Pins
    111
  - External Connection
    111
- Clock Settings
  111
  - SVD3 Operating Clock
    111
  - Clock Supply in SLEEP Mode
    111
  - Clock Supply in DEBUG Mode
    112
- Operations
  112
  - SVD3 Control
    112
  - SVD3 Operations
    113
- SVD3 Interrupt and Reset
  113
  - SVD3 Interrupt
    113
  - SVD3 Reset
    114
- Control Registers
  114
  - SVD3 Clock Control Register
    114
  - SVD3 Control Register
    115
  - SVD3 Status and Interrupt Flag Register
    116
  - SVD3 Interrupt Enable Register
    117
16-Bit Timers (T16)

118
- Overview
  118
- Input Pin
  118
- Clock Settings
  119
  - T16 Operating Clock
    119
  - Clock Supply in SLEEP Mode
    119
  - Clock Supply in DEBUG Mode
    119
  - Event Counter Clock
    119
- Operations
  119
  - Initialization
    119
  - Counter Underflow
    120
  - Operations in Repeat Mode
    120
  - Operations in One-Shot Mode
    120
  - Counter Value Read
    121
- Interrupt
  121
- Control Registers
  121
  - T16 Ch.n Clock Control Register
    121
  - T16 Ch.n Mode Register
    122
  - T16 Ch.n Control Register
    122
  - T16 Ch.n Reload Data Register
    123
  - T16 Ch.n Counter Data Register
    123
  - T16 Ch.n Interrupt Flag Register
    123
  - T16 Ch.n Interrupt Enable Register
    124
12 Uart (Uart3)

125
- Overview
  125
- Input/Output Pins and External Connections
  126
  - List of Input/Output Pins
    126
  - External Connections
    126
  - Input Pin Pull-Up Function
    126
  - Output Pin Open-Drain Output Function
    126
  - Input/Output Signal Inverting Function
    126
- Clock Settings
  126
  - UART3 Operating Clock
    126
  - Clock Supply in SLEEP Mode
    127
  - Clock Supply in DEBUG Mode
    127
  - Baud Rate Generator
    127
- Data Format
  127
- Operations
  128
  - Initialization
    128
  - Data Transmission
    129
  - Data Reception
    130
  - Irda Interface
    131
  - Carrier Modulation
    131
  - Framing Error
    132
  - Parity Error
    132
- Receive Errors
  132
  - Overrun Error
    133
- Interrupts
  133
- Control Registers
  133
13 Synchronous Serial Interface (SPIA)

139
- Overview
  139
- Input/Output Pins and External Connections
  140
  - List of Input/Output Pins
    140
  - External Connections
    140
  - Pin Functions in Master Mode and Slave Mode
    141
  - Input Pin Pull-Up/Pull-Down Function
    141
- Clock Settings
  141
  - SPIA Operating Clock
    141
  - Clock Supply in DEBUG Mode
    142
  - SPI Clock (Spiclkn) Phase and Polarity
    142
- Data Format
  143
- Operations
  143
  - Initialization
    143
  - Data Transmission in Master Mode
    143
  - Data Reception in Master Mode
    145
  - Terminating Data Transfer in Master Mode
    146
  - Data Transfer in Slave Mode
    146
  - Terminating Data Transfer in Slave Mode
    148
- Interrupts
  148
- Control Registers
  149
  - SPIA Ch.n Mode Register
    149
  - SPIA Ch.n Control Register
    150
  - SPIA Ch.n Transmit Data Register
    151
  - SPIA Ch.n Receive Data Register
    151
  - SPIA Ch.n Interrupt Flag Register
    151
  - SPIA Ch.n Interrupt Enable Register
    152
100 C (I2C)

153
- Overview
  153
- Input/Output Pins and External Connections
  154
  - List of Input/Output Pins
    154
  - External Connections
    154
- Clock Settings
  155
  - I2C Operating Clock
    155
  - Clock Supply in DEBUG Mode
    155
  - Baud Rate Generator
    155
- Operations
  156
  - Initialization
    156
  - Data Transmission in Master Mode
    157
  - Data Reception in Master Mode
    159
  - 10-Bit Addressing in Master Mode
    161
  - Data Transmission in Slave Mode
    162
  - Data Reception in Slave Mode
    164
  - Slave Operations in 10-Bit Address Mode
    166
  - Automatic Bus Clearing Operation
    166
  - Error Detection
    167
- Interrupts
  168
- Control Registers
  169
  - I2C Ch.n Clock Control Register
    169
  - I2C Ch.n Mode Register
    170
  - I2C Ch.n Baud-Rate Register
    170
  - I2C Ch.n Own Address Register
    170
  - I2C Ch.n Control Register
    171
  - I2C Ch.n Transmit Data Register
    172
  - I2C Ch.n Receive Data Register
    172
  - I2C Ch.n Status and Interrupt Flag Register
    172
  - I2C Ch.n Interrupt Enable Register
    173
16-Bit PWM Timers (T16B)

175
- Overview
  175
- Input/Output Pins
  176
- Clock Settings
  177
  - T16B Operating Clock
    177
  - Clock Supply in SLEEP Mode
    177
  - Clock Supply in DEBUG Mode
    177
  - Event Counter Clock
    177
- Operations
  178
  - Initialization
    178
  - Counter Block Operations
    179
  - Comparator/Capture Block Operations
    182
  - TOUT Output Control
    190
- Interrupt
  196
- Control Registers
  196
16 Sound Generator (SNDA)

205
- Overview
  205
- Output Pins and External Connections
  206
  - List of Output Pins
    206
  - Output Pin Drive Mode
    206
  - External Connections
    206
- Clock Settings
  207
  - SNDA Operating Clock
    207
  - Clock Supply in SLEEP Mode
    207
  - Clock Supply in DEBUG Mode
    207
- Operations
  207
  - Initialization
    207
  - Buzzer Output in Normal Buzzer Mode
    207
  - Buzzer Output in One-Shot Buzzer Mode
    210
  - Output in Melody Mode
    211
- Interrupts
  213
- Control Registers
  213
  - SNDA Clock Control Register
    213
  - SNDA Select Register
    214
  - SNDA Control Register
    215
  - SNDA Data Register
    215
  - SNDA Interrupt Flag Register
    216
  - SNDA Interrupt Enable Register
    217
17 IR Remote Controller (REMC3)

218
- Overview
  218
- Input/Output Pins and External Connections
  218
  - Output Pin
    218
  - External Connections
    219
- Clock Settings
  219
  - REMC3 Operating Clock
    219
  - Clock Supply in SLEEP Mode
    219
  - Clock Supply in DEBUG Mode
    219
- Operations
  219
  - Initialization
    219
  - Data Transmission Procedures
    220
  - REMO Output Waveform
    220
  - Continuous Data Transmission and Compare Buffers
    222
- Interrupts
  223
- Application Example: Driving el Lamp
  224
- Control Registers
  224
18 F Converter (RFC)

230
- Overview
  230
- Input/Output Pins and External Connections
  231
  - List of Input/Output Pins
    231
  - External Connections
    231
- Clock Settings
  232
  - RFC Operating Clock
    232
  - Clock Supply in SLEEP Mode
    232
  - Clock Supply in DEBUG Mode
    232
- Operations
  232
  - Initialization
    232
  - Operating Modes
    233
  - RFC Counters
    233
  - Converting Operations and Control Procedure
    234
  - CR Oscillation Frequency Monitoring Function
    236
- Interrupts
  236
- Control Registers
  237
12-Bit A/D Converter (ADC12A)

241
- Overview
  241
- Input Pins and External Connections
  242
  - List of Input Pins
    242
  - External Connections
    242
- Clock Settings
  242
  - ADC12A Operating Clock
    242
  - Sampling Time
    242
- Operations
  243
- Interrupts
  246
- Control Registers
  246
20 Multiplier/Divider (COPRO2)

251
- Overview
  251
- Operation Mode and Output Mode
  251
- Multiplication
  252
- Division
  253
- Mac
  255
- Reading Operation Results
  257
21 Electrical Characteristics

258
22 Basic External Connection Diagram

272
23 Package

274
Appendix A List of Peripheral Circuit Control Registers

277
- Power Generator (PWG)
  277
- 0X4300-0X431E Universal Port Multiplexer (UPMUX)
  293
- UART (UART3) Ch.0
  295
- 0X43C0-0X43D2
  297
- 0X5040-0X505A 16-Bit PWM Timer (T16B) Ch.1
  299
Appendix B Power Saving

310
- Operating Status Configuration Examples for Power Saving
  310
- Other Power Saving Methods
  311
Appendix C Mounting Precautions

312
Appendix D Measures against Noise

315
Appendix E Initialization Routine

316

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Epson S1C17M24 Technical Manual (319 pages)

Table of Contents

1 Overview

2 Power Supply, Reset, and Clocks

3 CPU and Debugger

4 Memory and Bus

5 Interrupt Controller (ITC)

6 O Ports (PPORT)

7 Universal Port Multiplexer (UPMUX)

8 Watchdog Timer (WDT2)

9 Real-Time Clock (RTCA)

10 Supply Voltage Detector (SVD3)

16-Bit Timers (T16)

12 Uart (Uart3)

13 Synchronous Serial Interface (SPIA)

100 C (I2C)

16-Bit PWM Timers (T16B)

16 Sound Generator (SNDA)

17 IR Remote Controller (REMC3)

18 F Converter (RFC)

12-Bit A/D Converter (ADC12A)

20 Multiplier/Divider (COPRO2)

21 Electrical Characteristics

22 Basic External Connection Diagram

23 Package

Appendix A List of Peripheral Circuit Control Registers

Appendix B Power Saving

Appendix C Mounting Precautions

Appendix D Measures against Noise

Appendix E Initialization Routine

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