Motorola MVME167-004B Manuals

Manuals and User Guides for Motorola MVME167-004B. We have 3 Motorola MVME167-004B manuals available for free PDF download: Installation Manual, User Manual

Motorola MVME167-004B Installation Manual (176 pages)

Single Board Computer

Brand: Motorola | Category: Motherboard | Size: 1.02 MB

Table of Contents
7
This Chapter Covers
15
About this Manual
15
Terminology, Conventions, and Deþnitions Used in this Manual
16
Related Documentation
19
This Chapter Covers
23
General Description
23
- Onboard Memory Mezzanine Module
  24
- SCSI Mass Storage Interface
  24
- Serial Ports
  25
- Parallel (Printer) Port
  25
- Ethernet Transceiver Interface
  25
- 167Bug Firmware
  26
Features
26
Speciþcations
28
- Conformance to Requirements
  28
Board Level Overview
29
- Connectors
  29
- Adapters
  29
- Transition Modules
  30
- Asics
  30
  - Vmechip2 ASIC
    31
  - Pccchip2 ASIC
    31
  - Bus Transfers
    31
  - MEMC040 Memory Controller ASIC
    32
  - MCECC Memory Controller ASIC
    32
Functional Description
32
- Front Panel Switches and Leds
  33
- Front Panel Switches
  33
- Front Panel Leds
  33
- Data Bus Structure
  34
  - Local Bus Arbitration
    34
- Mc68040 Mpu
  34
- Eprom
  35
  - Programmable EPROM Features
    35
- Static RAM
  35
  - Optional SRAM Battery Backup
    36
- Onboard DRAM
  37
  - Stacking Mezzanines
    38
  - DRAM Programming Considerations
    38
- Battery Backed up RAM and Clock
  39
- Vmebus Interface
  40
- I/O Interfaces
  40
  - Serial Port Interface
    40
  - Parallel Port Interface
    42
  - Ethernet Interface
    43
  - SCSI Interface
    44
- Local Resources
  45
  - Programmable Tick Timers
    45
  - Watchdog Timer
    45
  - Software-Programmable Hardware Interrupts
    45
  - Local Bus Timeout
    45
Memory Maps
46
- Local Bus Memory Map
  46
  - Normal Address Range
    46
  - Local Bus Memory Map
    47
  - Local I/O Devices Memory Map
    48
- Vmebus Memory Map
  50
  - Vmebus Accesses to the Local Bus
    50
  - Vmebus Short I/O Memory Map
    50
This Chapter Covers
51
Unpacking the Equipment
51
Overview of Startup Procedure
52
Preparing the Hardware
55
Installing the Hardware
65
System Considerations
76
- Backplane Power Connections
  76
- Memory Address Ranges
  76
- DRAM Addressing
  76
- Global Bus Timeout
  76
- Multiple Module Cage Configuration
  77
- GCSR Location Monitor Register
  77
- Ethernet LAN (+12 VDC) Fuse
  77
- SCSI Bus Termination
  78
- Storage and the Real-Time Clock
  78
This Chapter Covers
79
Introduction to Mvme167Bug
79
- Overview of M68000 Firmware
  79
- Description of 167Bug
  80
  - Command Facilities
    80
  - Trap #15 System Calls
    80
  - Debugger or Diagnostic Directories
    81
  - Keyboard Control
    81
- Similarity to Other Motorola Debugging Firmware
  82
- 167Bug Implementation
  82
- Memory Requirements
  83
Booting and Restarting 167Bug
83
- Starting up 167Bug
  84
- Autoboot
  84
  - Autoboot Sequence
    84
- Romboot
  85
  - Romboot Sequence
    85
- Network Boot
  86
  - Network Boot Sequence
    86
  - Memory Maps
    86
- Restarting the System
  87
  - Reset
    88
  - Abort
    88
  - Break
    89
  - SYSFAIL* Assertion/Negation
    90
  - MPU Clock Speed Calculation
    90
Disk I/O Support
91
- Disk Support Facilities
  91
  - Parameter Tables
    91
  - Supported Controllers
    91
- Blocks Versus Sectors
  92
- Device Probe Function
  92
- Disk I/O Via 167Bug Commands
  93
  - IOI (Input/Output Inquiry)
    93
  - IOP (Physical I/O to Disk)
    93
  - IOT (I/O Teach)
    93
  - IOC (I/O Control)
    93
  - BO (Bootstrap Operating System)
    93
  - BH (Bootstrap and Halt)
    94
- Disk I/O Via 167Bug System Calls
  94
  - Controller Command Packets
    94
- Default 167Bug Controller and Device Parameters
  95
- Disk I/O Error Codes
  96
Network I/O Support
97
- Intel 82596 LAN Coprocessor Ethernet Driver
  97
- UDP/IP Protocol Modules
  97
- RARP/ARP Protocol Modules
  98
- BOOTP Protocol Module
  98
- TFTP Protocol Module
  98
- Network Boot Control Module
  98
- Network I/O Error Codes
  99
Multiprocessor Support
99
- Multiprocessor Control Register (MPCR) Method
  99
  - MPCR Status Codes
    100
  - Multiprocessor Address Register (MPAR)
    100
  - MPCR Powerup Sequence
    100
- Global Control and Status Register (GCSR) Method
  102
Diagnostic Facilities
103
- 167Bug Diagnostic Test Groups
  105
This Chapter Covers
107
Entering Debugger Command Lines
107
- Terminal Input/Output Control
  107
- Debugger Command Syntax
  109
- Syntactic Variables
  110
  - Expression as a Parameter
    110
  - Address as a Parameter
    111
  - Address Formats
    112
  - Offset Registers
    113
- Port Numbers
  115
Entering and Debugging Programs
116
Calling System Utilities from User Programs
117
Preserving the Debugger Operating Environment
117
- 167Bug Vector Table and Workspace
  118
  - Examples
    119
- Hardware Functions
  119
- Exception Vectors Used by 167Bug
  119
Floating Point Support
124
- Single Precision Real
  126
- Double Precision Real
  126
- Extended Precision Real
  126
- Packed Decimal Real
  127
- ScientiþC Notation
  127
The 167Bug Debugger Command Set
128
- Debugger Commands
  128
This Appendix Covers
133
Conþgure Board Information Block
133
Setting Environment to Bug/Operating System
135
Disk/Tape Controller Modules Supported
147
Disk/Tape Controller Default Conþgurations
148
IOT Command Parameters for Supported Floppy Types
150
- Network Controller Modules Supported
  153
Introduction
161
Levels of Implementation
163
- Signal Adaptations
  164
- Sample Conþgurations
  164
- Proper Grounding
  167

Motorola MVME167-004B User Manual (84 pages)

Brand: Motorola | Category: Single board computers | Size: 3.28 MB

Table of Contents
4
General Information
12
Introduction
12
Model Designations
12
Table 1-1. MVME167 Model Designations
12
Features
13
Specifications
14
Cooling Requirements
14
FCC Compliance
15
Table 1-2. MVME167 Specifications
15
General Description
16
Equipment Required
17
Related Documentation
18
Support Information
19
Manual Terminology
20
Hardware Preparation and Installation
22
Introduction
22
Unpacking Instructions
22
Hardware Preparation
22
General Purpose Readable Jumpers on Header J1
23
System Controller Header J2
23
Figure 2-1. MVME167 Switches, Headers, Connectors, Fuses, and Leds
24
Serial Port 4 Clock Configuration Select Headers J6 and J7
25
SRAM Backup Power Source Select Header J8
26
Installation Instructions
27
MVME167 Module Installation
27
System Considerations
28
Operating Instructions
30
Introduction
30
Controls and Indicators
30
ABORT Switch S1
30
RESET Switch S2
30
Front Panel Indicators (DS1 - DS4)
30
Memory Maps
32
Local Bus Memory Map
32
Normal Address Range
32
Table 3-1. Local Bus Memory Map
33
Table 3-2. Local I/O Devices Memory Map
34
Detailed I/O Memory Maps
35
Table 3-3. Vmechip2 Memory Map (Sheet 1 of 3)
37
Table 3-4. Pccchip2 Memory Map
43
Table 3-5. Printer Memory Map
45
Table 3-6. MEMC040 Internal Register Memory Map
46
Table 3-7. MCECC Internal Register Memory Map
46
Table 3-8. Cirrus Logic CD2401 Serial Port Memory Map
48
Table 3-9. 82596CA Ethernet LAN Memory Map
52
Table 3-10. 53C710 SCSI Memory Map
53
Table 3-11. MK48T08 BBRAM,TOD Clock Memory Map
54
Table 3-12. BBRAM Configuration Area Memory Map
54
BBRAM,TOD Clock Memory Map
55
Table 3-13. TOD Clock Memory Map
55
Interrupt Acknowledge Map
57
Vmebus Memory Map
57
Vmebus Accesses to the Local Bus
57
Vmebus Short I/O Memory Map
58
Software Initialization
59
Multi-MPU Programming Considerations
59
Local Reset Operation
59
Functional Description
60
Introduction
60
MVME167 Functional Description
60
Data Bus Structure
60
Mc68040 Mpu
61
Eprom
61
Sram
61
Onboard DRAM
62
Battery Backed up RAM and Clock
63
Vmebus Interface
63
I/O Interfaces
63
Serial Port Interface
63
Parallel Port Interface
64
Ethernet Interface
65
SCSI Interface
65
SCSI Termination
66
Local Resources
66
Programmable Tick Timers
66
Watchdog Timer
66
Software-Programmable Hardware Interrupts
66
Local Bus Timeout
66
Timing Performance
67
Local Bus to DRAM Cycle Times
67
ROM Cycle Times
67
SCSI Transfers
67
LAN DMA Transfers
68
Remote Status and Control
68
Figure 4-1. MVME167 Main Module Block Diagram
69
Figure 4-2. Parity DRAM Mezzanine Module Block Diagram
70
Figure 4-3. ECC DRAM Mezzanine Module Block Diagram
71
Introduction
72
Table A-1. EIA-232-D Interconnections
73
Levels of Implementation
74
Signal Adaptations
74
Sample Configurations
75
Figure A-1. Middle-Of-The-Road EIA-232-D Configuration
75
Figure A-2. Minimum EIA-232-D Connection
76
Proper Grounding
77

Motorola MVME167-004B User Manual (82 pages)

Single Board Computer

Brand: Motorola | Category: Motherboard | Size: 0.73 MB

Table of Contents
3
Chapter 1 General Information

11
- Introduction
  11
- Model Designations
  11
- Table 1-1. MVME167 Model Designations
  11
- Features
  12
- Specifications
  13
  - Cooling Requirements
    13
  - FCC Compliance
    14
  - Table 1-2. MVME167 Specifications
    14
- General Description
  15
- Equipment Required
  16
- Related Documentation
  17
- Support Information
  18
- Manual Terminology
  19
Chapter 2 Hardware Preparation and Installation

21
Chapter 3 Operating Instructions

29
Chapter 4 Functional Description

59
- Introduction
  59
- MVME167 Functional Description
  59
  - Data Bus Structure
    59
  - Mc68040 Mpu
    60
  - Eprom
    60
  - Sram
    60
  - Onboard DRAM
    61
  - Battery Backed up RAM and Clock
    62
  - Vmebus Interface
    62
  - I/O Interfaces
    62
    
    Serial Port Interface
    62
    
    Parallel Port Interface
    63
    
    Ethernet Interface
    64
    
    SCSI Interface
    64
    
    SCSI Termination
    65
  - Local Resources
    65
    
    Programmable Tick Timers
    65
    
    Watchdog Timer
    65
    
    Software-Programmable Hardware Interrupts
    65
    
    Local Bus Timeout
    65
  - Timing Performance
    66
    
    Local Bus to DRAM Cycle Times
    66
    
    ROM Cycle Times
    66
    
    SCSI Transfers
    66
    
    LAN DMA Transfers
    67
  - Remote Status and Control
    67
  - Figure 4-1. MVME167 Main Module Block Diagram
    68
  - Figure 4-2. Parity DRAM Mezzanine Module Block Diagram
    69
  - Figure 4-3. ECC DRAM Mezzanine Module Block Diagram
    70
Appendix A Eia-232-D Interconnections

71

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