Dg-Board (3 Of 4) Block Diagram - Panasonic TH-65PX600U Service Manual
Digital high definition plasma television
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Also See for TH-65PX600U:
- Operating instructions manual (63 pages) ,
- Service manual (83 pages) ,
- Technical manual (38 pages)
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15.19. DG-Board (3 of 4) Block Diagram
OSD
116
112
122
117
128
123
111
110
107 105
11
12
13
14
PORT_D
(OSD INPUT)
IC4037
GC5 PROCESSOR
AI
PIXEL
OSD MIX
CONVERTER
GAMMA
15
TH-65PX600U
DG-Board (3 of 4) Block Diagram
IC1103
MAIN MICOM
109
3
216
215
212
209 211
6
97
FIFO FOR IP
DI0-DI31
DO0-DO31
FPGA2
IC1501
Spartan3E-1600
YO0-YO9
THQYO1-9
CO0-CO9
THQCO1-9
THQ
THQ
YOF2FCOF
POSTIP
Y/C
THQHOUT
HOUT,VOUT,
CKOUT
THQVOUT
THQCKOUT
PORT-FHQ
(GC3E&HQ1)
LVDS_PD
FHQYIN0-9
YIN0-9
FHQCIN0-9
CIN0-9
FHQ
FHQ
YOF2FCOF
POSTIP
Y/C
FHQHIN
HIN,VIN,
CKIN
FHQVIN
FHQCKIN
ROE0-ROE9
ROE0-9
ROE
GOE0-GOE9
GOE0-9
GOE
TTL PARALLEL DATA -> LVDS(SERIAL)
BOE
BOE0-BOE9
BOE0-9
VSOE
PORT-E
(output for Panel)
HSOE
CLKOE
DG5
1
2
4
5
6
7
TO D5
136
135
168
IC1101
X1100
X1101
4M
FLASH
ROM
RESET
IC1602
FIFO FOR BNR
IC1603
DI0-DI31
IC1604
DO0-DO31
32M FIFO
32M FIFO
16M SDRAM
CF,OE,WE,BYTE
A0-A18
CFG DATA
DQ0-DQ7
CFG-RST
CFG-DONE
IIC
FPGA-RST
SDA
RST
DLYYC
TMP
SCL
27MHz
REFCK-FB
TDO
TMS
TCK
FPGA1
IC1401
CFG DATA
Virtex4-SX25
DLYYC
TMP
CFG-RST
CFG-DONE
FPGA-RST
IIC
SDA
RST
SCL
27MHz
REFCK-FB
TDO
TMS
TCK
LVDS OUTPUT
OSD7-OSD15
YS,OSDH
OSDCLK
PEAKS
OSD
OSH,OSV,
FIFO FOR OSD
OSCK
DI0-DI31
DO0-DO31
FIFO FOR VSC
DI0-DI19
DO0-DO19
9
10
11
12
14
15
20 21
23
24 25
26
28 29
30
31
99
169
63 78 62
RESET
REFCK_FB
CFG_RST
Q1601
IC1601
MAIN2_2.5V
RESET
4
OUT
VDD
1
Q1301
SDA2
Q1302
SCL2
CFG_TDO_A
CFG_TMS_A
CFG_TCK_A
CFG_TDI_A
IC1301
DG
DIGITAL SIGNAL PROCESSOR
32M FIFO
MICOM
IC1302
HDMI INTERFACE
32M FIFO
TH-65PX600U
DG-Board (3 of 4) Block Diagram
TH-65PX600U
21
22
23
24
25
26
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