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11.8.2
Contention between TCNT Write and Increment
If a timer counter clock pulse is generated during the T
takes priority and the counter is not incremented. Figure 11.11 shows this operation.
ø
Address
Internal write signal
TCNT input clock
TCNT
Figure 11.11 Contention between TCNT Write and Increment
Rev. 3.0, 10/02, page 342 of 686
state of a TCNT write cycle, the write
2
TCNT write cycle by CPU
T1
T2
TCNT address
N
M
Counter write data
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