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Interrupt Exception Handling Sequence; Figure 5.5 Interrupt Exception Handling - Hitachi H8S/2215 Series Hardware Manual

Hitachi single-chip microcomputer
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5.6.3

Interrupt Exception Handling Sequence

Figure 5.5 shows the interrupt exception handling sequence. The example shown is for the case
where interrupt control mode 0 is set in advanced mode, and the program area and stack area are in
on-chip memory.

Figure 5.5 Interrupt Exception Handling

Rev. 3.0, 10/02, page 91 of 686

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