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H'0000 0000
Area P0
H'8000 0000
Area P1
H'A000 0000
Area P2
H'C000 0000
Area P3
H'E000 0000
Area P4
H'FFFF FFFF
Privileged mode
Figure 3.3 Physical Address Space (MMUCR.AT=0)
Single Address Translation: When the MMU is enabled, the virtual address space is divided into
units called pages. Physical addresses are translated in page units. Address translation tables in
external memory hold information such as the physical address that corresponds to the virtual
address and memory protection codes. When an access to areas P1 or P2 occurs, there is no TLB
access and the physical address is defined uniquely by hardware. If it belongs to area P0, P3 or
U0, the TLB is searched by virtual address and, if that virtual address is registered in the TLB, the
access hits the TLB. The corresponding physical address and the page control information are read
from the TLB and the physical address is determined.
External memory
space
Area 0
Area 1
Area 2
Area 3
Area 4
Area 5
Area 6
Area 7
H'0000 0000
Area U0
Cacheable
H'8000 0000
Address error
H'FFFF FFFF
User mode
63
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