H8/3834, H8/3836, H8/3837
Block Diagram
P1
/TMOW
0
P1
/TMOFL
1
P1
/TMOFH
2
P1
/TMIG
3
P1
/PWM
4
P1
/IRQ
/TMIB
5
1
P1
/IRQ
/TMIC
6
2
P1
/IRQ
/TMIF
7
3
P2
/IRQ
/ADTRG
0
4
P2
/UD
1
P2
2
P2
3
P2
4
P2
5
P2
6
P2
7
P3
/SCK
0
1
P3
/SI
1
1
P3
/SO
2
1
P3
/SCK
3
2
P3
/SI
4
2
P3
/SO
5
2
P3
/STRB
6
P3
/CS
7
P4
/SCK
0
3
P4
/RXD
1
P4
/TXD
2
P4
/IRQ
3
0
P5
/WKP
/SEG
0
0
1
P5
/WKP
/SEG
1
1
2
P5
/WKP
/SEG
2
2
3
P5
/WKP
/SEG
3
3
4
P5
/WKP
/SEG
4
4
5
P5
/WKP
/SEG
5
5
6
P5
/WKP
/SEG
6
6
7
P5
/WKP
/SEG
7
7
8
ROM
(PROM or mask ROM)
(32, 48, or 64 kbytes)
Timer A
Timer B
Timer C
Timer F
Timer G
Port B
72
CPU
H8/300L
RAM
(1, 2, or 2 kbytes)
LCD
Serial
communications
interface 1
Serial
communications
interface 2
Serial
communications
interface 3
14-bit PWM
A/D converter
Port C
V
1
V
2
V
3
PA
/COM
4
3
PA
/COM
2
3
PA
/COM
2
1
PA
/COM
1
0
P9
/SEG
/CL
7
40
1
/SEG
P9
/CL
39
6
2
P9
/SEG
/DO
5
38
/SEG
P9
/M
37
4
P9
/SEG
3
36
P9
/SEG
2
35
P9
/SEG
1
34
P9
/SEG
0
33
P8
/SEG
7
32
/SEG
P8
31
6
P8
/SEG
5
30
/SEG
P8
29
4
P8
/SEG
3
28
P8
/SEG
2
27
P8
/SEG
1
26
P8
/SEG
0
25
P7
/SEG
7
24
P7
/SEG
23
6
P7
/SEG
5
22
/SEG
P7
21
4
P7
/SEG
3
20
P7
/SEG
2
19
P7
/SEG
1
18
P7
/SEG
0
17
P6
/SEG
16
7
P6
/SEG
15
6
P6
/SEG
5
14
/SEG
P6
13
4
P6
/SEG
3
12
P6
/SEG
2
11
P6
/SEG
1
10
P6
/SEG
0
9