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P9
7
Table C-9 (e) Port 9 Port Read (Pin P9
Setting
Clock input enable
Clock output enable
Clock input/output
enable
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Figure C-9 (e) Schematic Diagram of Port 9, Pin P9
7
DDR = 0
DDR = 1
Reset
R
Q
D
P9 DDR
7
C
WP9D
Reset
R
Q
D
P9 DR
7
C
WP9
RP9
)
Port Read Data
Input clock value
Output clock value
Pin value
DR value
428
WP9D:
Write to P9DDR
WP9:
Write to Port 9
RP9:
Read Port 9
SCI timer module
Clock input enable
Clock output enable
Clock output
Clock input
7
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