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• Low Drop Out (LDO) regulator
It is important that any power source complies with specified voltage tolerances and can source the
required peak currents.
When using IRIS-W10 with a battery, it is important that the chosen battery can handle the peak
power of the module. In case of battery supply, consider adding extra capacitance on the supply line
to avoid capacity degradation. For information about voltage supply requirement and current
consumption see also IRIS-W10 data sheet [2].
2.1.1
Digital I/O interfaces reference voltage, VCCIO
IRIS-W10 I/O interface voltage is set to either 1.8 V or 3.3 V by connecting the VCCIO pin to the +1V8
or +3V3 pin.
To configure the interface voltage, VCCIO:
•
Connect pin L6 to pin L7 for 1.8V
•
Connect pin L6 to pin L8 for 3.3 V
2.2 Configuration pins
IRIS-W10 has seven boot configuration pins. For normal operation, the pins must have the correct
settings during boot and power-up. Further details are available in the EVK-IRIS-W1 user guide
Configuration
Pin name
bits
CON[11]
RF_CNTL2 / CONFIG_DAP_USE_JTAG
CON[8]
RF_CNTL1 /
CONFIG_DIS_KEY_ROT_DBG
CON[7]
RF_CNTL3 / CONFIG_VTOR_SEL
CON[3,2,1,0]
EXT_FREQ, ECT_PRI, EXT_GNT,
CEXT_REQ / CONFIG HOST BOOT [3..0]
Table 3: Boot strapping pins and options
UBX-23003263 - R04
C1 - Public
IRIS-W10 series - System integration manual
Pin number
Description
B7
0: SWD
1: (Default): JTAG
A7
0: Enable key rotation,
1: (Default): Disable key rotation
A8
0: addr defined by software (hard coded value,
0x1300_0000) is multiplexed to CM33 VTOR
1: (Default): CM 33 hardware default boot address
is multiplexed to CM33 VTOR (0x1303_0000)
M14, N14I,
CONFIG HOST BOOT [3..0] table:
M12, N12
1111: (Default) boot from QSPI FLASH
1110: ISP boot
1101: Serial boot
1100 :SDIO boot
1011: USB boot
1010: SPI EEPROM boot
Module integration
[3].
Page 10 of 62
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