Page 1 Hard Disk Drive Specification Deskstar 7K160 3.5 inch hard disk drive Models: HDS721616PLAT80 HDS721612PLAT80 HDS721680PLAT80 HDS721616PLA380 HDS721616PLA320 HDS721680PLA380 HDS721680PLA320 HDS721612PLA380 Version 2.0 6 July 2009...
Page 3 Hard Disk Drive Specification Deskstar 7K160 3.5 inch hard disk drive Models: HDS721616PLAT80 HDS721612PLAT80 HDS721680PLAT80 HDS721616PLA380 HDS721616PLA320 HDS721612PLA380 HDS721680PLA380 HDS721680PLA320 Version 2.0 6 July 2009...
Page 4 It is possible that this publication may contain reference to, or information about, Hitachi products (machines and programs), programming, or services that are not announced in your country. Such references or information must not be construed to mean that Hitachi intends to announce such Hitachi products, programming, or services in your coun- try.
Page 5: Table Of Contents
Table of Contents 1.0. General.........................1 1.1. Introduction......................1 1.2. References......................1 1.3. Abbreviations......................1 1.4. Caution........................3 2.0. General features of the drive ..................5 3.0. Fixed-disk subsystem description................9 3.1. Control electronics....................9 3.2. Head disk assembly ..................... 9 3.3. Actuator ........................ 9 4.0.
Page 6 6.9.3 Host Terminating Read DMA ..............34 6.9.4 Device Terminating Read DMA ...............35 6.9.5 Initiating Write DMA ................36 6.9.6 Device Pausing Write DMA ..............37 6.9.7 Device Terminating Write DMA ...............38 6.9.8 Host Terminating Write DMA ..............39 6.10. Addressing of registers ..................40 6.10.1 Cabling ....................40 7.0.
Page 7 7.9.4 Safe handling .....................62 7.9.5 Environment ....................62 7.9.6 Secondary circuit protection ..............62 7.10. Electromagnetic compatibility................63 7.10.1 CE Mark ....................63 7.10.2 C-TICK mark ...................63 7.10.3 BSMI mark ....................63 7.10.4 MIC Mark ....................63 7.11. Packaging......................63 7.11.1 Substance restriction requirements ............63 8.0.
Page 8 10.6.5 S.M.A.R.T. commands ................81 10.6.6 Off-line read scanning ................81 10.6.7 Error log ....................82 10.6.8 Self-test ....................82 10.7. Security Mode Feature Set................83 10.7.1 Security mode ..................83 10.7.2 Security level ...................83 10.7.3 Passwords ....................84 10.7.4 Operation example ...................84 10.7.5 Command table ..................88 10.8.
Page 9 11.0. Command protocol ....................127 11.1. PIO Data In commands................... 127 11.2. PIO Data Out Commands ................128 11.3. Non-data commands ..................130 11.4. DMA commands..................... 131 12.0. Command descriptions..................133 12.1. Check Power Mode (E5h/98h) ............... 138 12.2. Configure Stream (51h) .................. 139 12.3.
Page 10 12.31. Security Erase Prepare.................. 207 12.32. Security Erase Unit (F4h) ................208 12.33. Security Freeze Lock (F5h) ................210 12.34. Security Set Password (F1h)................. 211 12.35. Security Unlock (F2h) .................. 213 12.36. Seek (7xh)....................215 12.37. Set Features (EFh) ..................216 12.37.1 Set Transfer mode ................217 12.37.2 Write Cache ..................217 12.37.3 Advanced Power Management ............217...
Page 11 List of Tables Table 1: Formatted capacities..................11 Table 2: Mechanical positioning performance ............12 Table 3: Word Wide Name Assignment..............12 Table 4: Command overhead..................15 Table 5: Mechanical positioning performance ............15 Table 6: Full stroke seek time..................16 Table 7: Single track seek time...................16 Table 8: Latency Time....................17 Table 9: Drive ready time ...................17 Table 10: Description of operating modes..............17...
Page 12 Table 44: Random Vibration PSD profile breakpoints (nonoperating)......59 Table 45: Sinusoidal shock wave ................60 Table 46: Rotational shock ..................60 Table 47: Sound power levels..................61 Table 48: Register Set....................67 Table 49: Alternate Status Register ................68 Table 50: Device Control Register ................69 Table 51: Drive Address Register................70 Table 52: Device Head/Register.................70 Table 53: Error Register .....................71...
Page 13 Table 90: Idle Immediate command (E1h/95h)............165 Table 91: Initialize Device Parameters command (91h) ..........166 Table 92: Read Buffer (E4h) ..................167 Table 93: Read DMA command (C8h/C9h).............168 Table 94: Read DMA Ext Command (25h)..............170 Table 95: Read Log Ext Command (2Fh) ..............172 Table 96: Log Address Definition ................173 Table 97: General Purpose Log Directory..............174 Table 98: Extended Comprehensive SMART Error Log .........175...
Page 14 Table 136: Set Max Freeze Lock (F9h)..............225 Table 137: Set Max Address Ext command (37h)............226 Table 138: Set Multiple command (C6h) ..............228 Table 139: Sleep command (E6h/99h) ..............229 Table 140: S.M.A.R.T. Function Set command (B0h)..........230 Table 141: Device Attribute Data Structure .............235 Table 142: Individual Attribute Data Structure ............235 Table 143: Device Attribute Thresholds Data Structure ..........239 Table 144: Individual Threshold Data Structure ............239...
Page 15: General
1.0 General 1.1 Introduction This document describes the specifications of the Deskstar 7K160, a 3.5-inch hard disk drive with ATA interface and a rotational speed of 7200 RPM. HDS721616PLAT80 160 GB HDS721612PLAT80 120 GB HDS721680PLAT80 80 GB HDS721616PLA380, HDS721616PLA320 160 GB HDS721612PLA380 120 GB HDS721680PLA380, HDS721680PLA320...
Page 16 field replacement unit gravity (a unit of force) (32 ft/sec) per Hertz 1,000,000,000 bits 1,000,000,000 bytes ground hexadecimal hard disk drive Hertz Input integrated lead suspension Input/Output International Standards Organization 1,000 bytes Kbpi 1000 bits per inch kgf-cm kilogram (force)-centimeter kilohertz logical block addressing unit of A-weighted sound power...
Page 17: Caution
SELV secondary low voltage S.M.A.R.TSelf-Monitoring, Analysis, and Reporting Technology tracks per inch track transistor-transistor logic Underwriters Laboratory volt Verband Deutscher Electrotechniker watt 3-state transistor-transistor tristate logic 1.4 Caution • Do not apply force to the top cover. • Do not cover the breathing hole on the top cover. •...
Page 18 Deskstar 7K160 Hard Disk Drive Specification...
Page 19: General Features Of The Drive
2.0 General features of the drive • Formatted capacities of 160 GB, 120 GB and 80 GB • Spindle speeds of 7200 RPM • Fluid Dynamic Bearing motor • Enhanced IDE interface • Sector format of 512 bytes/sector • Closed-loop actuator servo •...
Page 20 Deskstar 7K160 Hard Disk Drive Specification...
Page 21 Part 1. Functional specification Deskstar 7K160 Hard Disk Drive specification...
Page 22 Deskstar 7K160 Hard Disk Drive Specification...
Page 23: Fixed-Disk Subsystem Description
3.0 Fixed-disk subsystem description 3.1 Control electronics The drive is electronically controlled by a microprocessor, several logic modules, digital/analog modules, and var- ious drivers and receivers. The control electronics performs the following major functions: • Controls and interprets all interface signals between the host controller and the drive. •...
Page 24 Deskstar 7K160 Hard Disk Drive Specification...
Page 25: Drive Characteristics
4.0 Drive characteristics 4.1 Default logical drive parameters Table 1: Formatted capacities PATA HDS721680PLAT80 HDS721612PLAT80 HDS721616PLAT80 HDS721680PLA3x0 HDS721612PLA380 HDS721616PLA3x0 SATA Physical Layout Label capacity (GB) Bytes per sector Sectors per track 720-1500 672-1280 720-1500 Number of heads Number of disks Data sectors per cylinder 567-1170 1134-2340...
Page 26: Data Sheet
Description 80 GB model 120 GB model 160 GB model Organization Hitachi GST Manufacturing Site Excelstor Plant China / Hitachi GST China Plant (GSP) Product Deskstar 7K160 000CCAh SHBU Block Assignment 320h for ExcelStor,China 326h for Excel- 321h for Excel-...
Page 27: Cylinder Allocation
4.4.2 Cylinder allocation Physical cylinder is calculated from the starting data track of 0. It is not relevant to logical CHS. Depending on the capacity some of the inner zone cylinders are not allocated. Zone Start Logical cyl. Stop Logical cyl. #cyl 4607 4608 4608...
Page 28 The spare cylinder is used by Hitachi Global Storage Technologies manufacturing and includes data sent from a defect location. Deskstar 7K160 Hard Disk Drive Specification...
Page 29: Performance Characteristics
4.5 Performance characteristics Drive performance is characterized by the following parameters: • Command overhead • Mechanical head positioning Seek time Latency • Data transfer speed • Buffering operation (Look ahead/Write cache) All the above parameters contribute to drive performance. There are other parameters that contribute to the perfor- mance of the actual system.
Page 30: Table 6: Full Stroke Seek Time
The terms “Typical” and “Max” are used throughout this document and are defined as follows: Typical The average of the drive population tested at nominal environmental and voltage conditions. Maximum value measured on any one drive over the full range of the environmental and voltage conditions.
Page 31: Drive Ready Time
4.5.2.4 Average latency Table 8: Latency Time Rotational speed Time for one Average latency (RPM) revolution (ms) (ms) 7200 RPM 4.17 4.5.3 Drive ready time Table 9: Drive ready time Power on to ready Typical (sec) Maximum (sec) Ready The condition in which the drive is able to perform a media access command (for exam- ple- read, write) immediately.
Page 32: Table 11: Mode Transition Times
4.5.4.2 Mode transition time Table 11: Mode transition times Transition time (sec) From Typical Maximum Standby Idle 0 ---> 7200 Idle Standby 7200 ---> 0 Immediately Immediately Standby Sleep Immediately Immediately Sleep Standby Immediately Immediately Unload idle Idle 7200 Idle Unload idle 7200 Low RPM Idle...
Page 33: Defect Flagging Strategy
5.0 Defect flagging strategy Media defects are remapped to the next available sector during the Format Process in manufacturing. The mapping from LBA to the physical locations is calculated by an internally maintained table. Shipped format • Data areas are optimally used. •...
Page 34 Deskstar 7K160 Hard Disk Drive Specification...
Page 35: Electrical Interface Specification
6.0 Electrical interface specification 6.1 Connector location Refer to the following illustration to see the location of the connectors PATA SATA Deskstar 7K160 Hard Disk Drive Specification...
Page 36: Pin Dc Power Connector
6.1.1 4 pin DC power connector The DC power connector is designed to mate with AMP part number 1-480424-0 using AMP pins part number 350078-4 (strip), part number 61173-4 (loose piece), or their equivalents. Pin assignments are shown in the figure below.
Page 37: Signal Definitions (Pata Model)
6.2 Signal definitions (PATA model) The pin assignments of interface signals are listed as follows: Table 13: Signal definitions SIGNAL Type SIGNAL Type RESET- 3–state DD08 3–state 3–state DD09 3–state 3–state DD10 3–state 3–state DD11 3–state 3–state DD12 3–state 3–state DD13 3–state 3–state...
Page 38: Signal Descriptions
6.3 Signal descriptions Table 14: Special signal definitions for Ultra DMA Special Definition Conventional (for Ultra DMA) Definition DDMARDY- IORDY Write Operation HSTROBE DIOR- STOP DIOW- HDMARDY- DIOR- Read Operation DSTROBE IORDY STOP DIOW- DD00–DD15 A 16-bit bi-directional data bus between the host and the drive. The lower 8 lines, DD00-07, are used for Regis- ter and ECC access.
Page 39 DASP- This is a time-multiplexed signal which indicates that a drive is active or that device 1 is present. This signal is driven by an Open-Drain driver and internally pulled up to 5 volts through a 10 kW resistor. During a Power-On initialization or after RESET- is negated, DASP- shall be asserted by Device 1 within 400 ms to indicate that device 1 is present.
Page 40 DMACK- This signal shall be used by the host in response to DMARQ to either acknowledge that data has been accepted, or that data is available. This signal is internally pulled up to 5 Volt through a 15kΩ resistor with a resistor tolerance value of –50% to +100%.
Page 41: Interface Logic Signal Levels (Pata Model)
6.4 Interface logic signal levels (pata model) The interface logic signals have the following electrical specification: Input High Voltage 2.0 V min Inputs Input Low Voltage 0.8 V max. Output High Voltage 2.4 V min. Outputs: Output Low Voltage 0.5 V max. 6.5 Signal definition (SATA model) SATA has receivers and drivers to be connected to Tx+/- and Rx +/- Serial data signal.
Page 42: Rx+ / Rx
6.5.2 RX+ / RX- These signals are the inbound high-speed differential signals that are connected to the serial ATA cable. The following standard shall be referenced about signal specifications. Serial ATA: High Speed Serialized AT Attachment Revision 1.0a 7-January -2003 Serial ATA-II Electrical Specification 1.0 26-May-2004.
Page 43: Reset Timings
6.6 Reset timings Table 15: System reset timing chart RESET- BUSY Table 16: System reset timing PARAMETER DESCRIPTION Min (µs) Max (µs) RESET low width RESET high to not BUSY Deskstar 7K160 Hard Disk Drive Specification...
Page 44: Pio Timings
6.7 PIO timings The PIO cycle timings meet Mode 4 of the ATA/ATAPI-6 description. Table 17: PIO cycle timings chart PARAMETER DESCRIPTION MIN (ns) MAX (ns) Cycle time – Address valid to DIOR-/DIOW- setup – DIOR-/DIOW- pulse width – DIOR-/DIOW- recovery time –...
Page 45: Multi-Word Dma Timings
• In the event that a host reads the status register only before the sector or block transfer DRQ interval, the DRQ interval 4.2 µs • In the event that a host reads the status register after or both before and after the sector or block transfer, the DRQ interval is 11.5 µs 6.8 Multi-word DMA timings The Multiword DMA timings meet Mode 2 of the ATA/ATAPI-6 description.
Page 46: Ultra Dma Timings
6.9 Ultra DMA timings The Ultra DMA timings meet Mode 0, 1, 2, and 4, 5 and 6 of the Ultra DMA Protocol. 6.9.1 Initiating Read DMA DMARQ DMACK- tACK tENV STOP tACK tENV t2CYC HDMARDY- tZIORDY tCYC tCYC DSTROBE tZAD DD(15:0) xxxxxxxxxxxxxxxxxxxxxxxxxxx...
Page 47: Host Pausing Read Dma
6.9.2 Host Pausing Read DMA Table 21: Ultra DMA cycle timing chart (Host pausing Read) DMARQ DMACK- STOP HDMARDY- tRFS DSTROBE Table 22: Ultra DMA cycle timings (Host pausing Read) PARAMETER MODE 0 MODE 1 MODE 2 MODE 3 MODE 4 MODE 5 MODE 6 DESCRIPTION...
Page 48: Host Terminating Read Dma
6.9.3 Host Terminating Read DMA Table 23: Ultra DMA cycle timing chart (Host pausing Read) DMARQ tMLI DMACK- tACK STOP tACK HDMARDY- tRFS tIORDYZ DSTROBE xxxxxxxxxxxxxxxxxx RD Data xxxxxxxxxxx DD(15:0) tZAH Device drives DD Host drives DD Table 24: Ultra DMA cycle timings (Host pausing Read) PARAMETER DESCRIP- MODE 0 MODE 1...
Page 49: Device Terminating Read Dma
6.9.4 Device Terminating Read DMA Table 25: Ultra DMA cycle timing chart (Host pausing Read) DMARQ tMLI DMACK- tACK STOP tACK HDMARDY- tIORDYZ DSTROBE xxxxxx xxxxxxxxxxxxxxxxxx xxxxxxxxxx DD(15:0) tZAH Host drives DD Device drives DD Table 26: Ultra DMA cycle timings (Device Terminating Read) PARAMETER DESCRIP- MODE 0 MODE 1...
Page 50: Initiating Write Dma
6.9.5 Initiating Write DMA Table 27: Ultra DMA cycle timing chart (Initiating Write) DMARQ DMACK- tENV tACK STOP tZIORDY t2CYC DDMARDY- tCYC tCYC tACK HSTROBE DD(15:0) xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx WT Data WT Data WT Data Host drives DD PARAMETER MODE 0 MODE 1 MODE 2 MODE 3 MODE 4...
Page 51: Device Pausing Write Dma
6.9.6 Device Pausing Write DMA Table 28: Ultra DMA cycle timing chart (Device Pausing Write) DMARQ DMACK- STOP DDMARDY- tRFS HSTROBE Table 29: Ultra DMA cycle timings (Device Pausing Write) PARAMETER MODE 0 MODE 1 MODE 2 MODE 3 MODE 4 MODE 5 MODE 6 DESCRIPTION...
Page 52: Device Terminating Write Dma
6.9.7 Device Terminating Write DMA Table 30: Ultra DMA cycle timing chart (Device Terminating Write) DMARQ tMLI DMACK- tACK STOP tIORDYZ DDMARDY- tACK tRFS HSTROBE xxx WT Data xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxx DD(15:0) Host drives DD PARAMETER MODE 0 MODE 1 MODE 2 MODE 3 MODE 4 MODE 5...
Page 53: Host Terminating Write Dma
6.9.8 Host Terminating Write DMA Table 32: Ultra DMA cycle timing chart (Host Terminating Write) DMARQ tMLI DMACK- tACK STOP tIORDYZ DDMARDY- tACK HSTROBE xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxx DD(15:0) Host drives DD Table 33: Ultra DMA cycle timings (Host Terminating Write) PARAMETER MODE 0 MODE 1 MODE 2...
Page 54: Addressing Of Registers
6.10 Addressing of registers The host addresses the drive through a set of registers called a Task File. These registers are mapped into the host's I/O space. Two chip select lines (CS0– and CS1–) and three address lines (DA0–2) are used to select one of these registers, while a DIOR–...
Page 55 Part 2. Interface specification Deskstar 7K160 Hard Disk Drive Specification...
Page 56 Deskstar 7K160 Hard Disk Drive Specification...
Page 57: Specification
7.0 Specification 7.1 Jumper settings 7.1.1 Jumper pin location Jumper pins Jumper pins 7.1.2 Jumper pin identification Pin I Pin A DERA001.prz Pin B Deskstar 7K160 Hard Disk Drive Specification...
Page 58: Jumper Pin Assignment
7.1.3 Jumper pin assignment There are four jumper settings as shown in the following sections: • 16 logical head default (normal use) • 15 logical head default • 32 GB clip • Power up in standby Within each of these four jumper settings the pin assignment selects Device 0, Device 1, Cable Selection, or Device 1 Slave Present as shown in the following figures.
Page 59: Jumper Positions
CS/SP RS V 7.1.4 Jumper positions 7.1.4.1 16 logical head default (normal use) The figure below shows the jumper positions used to select Device 0, Device 1, Cable Selection, or Device1 (Slave) Present. Deskstar 7K160 Hard Disk Drive Specification...
Page 60: Logical Head Default
Notes: 1. To enable the CSEL mode (Cable Selection mode) the jumper block must be installed at E-F. In the CSEL mode the drive address is determined by AT interface signal #28 CSEL as follows: • When CSEL is grounded or at a low level, the drive address is 0 (Device 0). •...
Page 61: Table 35: Jumper Positions For Capacity Clip To 32Gb
7.1.4.3 Capacity clip to 32GB The figure below shows the jumper positions used to select Device 0, Device 1, Cable Selection, or Device1 (Slave) Present while setting the drive capacity down to 32 GB for the purpose of compatibility. Table 35: Jumper positions for capacity clip to 32GB DEVICE 0 (M aster) DEVICE 1...
Page 62 Notes: 1. These jumper settings are used for limiting power supply current when multiple drives are used. 2. Command to spin up is SET FEATURES (subcommand 07h). Refer to 12.28 Set Features. 3. To enable the CSEL mode (Cable Selection mode) the jumper block must be installed at E-F. In the CSEL mode the drive address is determined by AT interface signal #28 CSEL as follows: •...
Page 63: Environment
7.2 Environment 7.2.1 Temperature and humidity Table 37: Temperature and humidity Operating conditions Temperature 0C to 60ºC (See note below) Relative humidity 8 to 90%, non-condensing Maximum wet bulb temperature 29.4ºC, non-condensing Maximum temperature gradient 20ºC/hour Altitude –300 to 3,048 m Non-operating conditions Temperature –40C to 65ºC...
Page 64: Corrosion Test
Table 38: Limits of temperature and humidity Environment Specification 36C/95% 31C/90% Wet Bulb 35C Wet Bulb 29.4C Non-operating Operating 65C/14% 60C/10% Temperature (C) Note: Storage temperature range is 0° to 65°. 7.2.2 Corrosion test The drive shows no sign of corrosion inside and outside of the hard disk assembly and is functional after being sub- jected to seven days at 50°C with 90% relative humidity.
Page 65: Input Voltage
7.3.1 Input voltage Table 39: Input voltage Input voltage supply During run and spin up Absolute max spike voltage Supply rise time +5 V 5 V ± 5% –0.3 to 5.5 V 0 to 5 sec +12 V 12 V + 10% –8% –0.3 to 15 V 0 to 5 sec To avoid damage to the drive electronics, power supply voltage spikes must not exceed specifications.
Page 66: Power Supply Current (Typical)
7.3.2 Power supply current (typical) Table 40: Power supply current of 80GB and 160GB models Power supply current of Total +5 Volts [mA] +12 Volts [mA] 80 GB – 160 GB PATA models (values in milliamps. RMS) Pop Mean Std Dev Pop Mean Std Dev Idle average...
Page 67: Power Supply Generated Ripple At Drive Power Connector
7.3.3 Power supply generated ripple at drive power connector Table 41: Power supply generated ripple at drive power connector Maximum (mV pp) +5 V dc 0-10 +12 V dc 0-10 During drive start up and seeking 12-volt ripple is generated by the drive (referred to as dynamic loading). If the power of several drives is daisy chained together, the power supply ripple plus the dynamic loading of the other drives must remain within the above regulation tolerance.
Page 68: Reliability
7.4 Reliability 7.4.1 Data integrity No more than one sector is lost at Power loss condition during the write operation when the write cache option is disabled. If the write cache option is active, the data in write cache will be lost. To prevent the loss of customer data, it is recommended that the last write access before power off be issued after setting the write cache off.
Page 69: Mechanical Specifications
7.5 Mechanical specifications 7.5.1 Physical dimensions and weight BREATHER HOLE All dimensions in the above figure are in millimeters. The breather hole must be kept uncovered in order to keep the air pressure inside of the disk enclosure equal to external air pressure.
Page 70: Mounting Hole Locations
7.5.2 Mounting hole locations The mounting hole locations and size of the drive are shown below. All dimensions are in mm. (6X) Max. penetration 4.5 mm Side View I/F Connector Bottom View (4X) Max. penetration 4.0 mm Thread 6-32 UNC 41.28±0.5 44.45±0.2 95.25±0.2...
Page 71: Connector Locations
7.5.3 Connector locations SATA model 42.73 13.43 (3X) 33.39 5.08+/-0.1 Deskstar 7K160 Hard Disk Drive Specification...
Page 72: Drive Mounting
7.5.4 Drive mounting The drive will operate in all axes (6 directions). Performance and error rate will stay within specification limits if the drive is operated in the other orientations from which it was formatted. For reliable operation, the drive must be mounted in the system securely enough to prevent excessive motion or vibration of the drive during seek operation or spindle rotation, using appropriate screws or equivalent mounting hardware.
Page 73: Vibration And Shock
7.6 Vibration and shock All vibration and shock measurements recorded in this section are made with a drive that has no mounting attach- ments for the systems. The input power for the measurements is applied to the normal drive mounting points. 7.6.1 Operating vibration 7.6.1.1 Random vibration The test is 30 minutes of random vibration using the power spectral density (PSD) levels shown below in each of...
Page 74: Operating Shock
• 0.5 oct/min sweep rate • 3 minutes dwell at two major resonances 7.6.3 Operating shock The drive meets the following criteria while operating in the conditions described below. The shock test consists of 10 shock inputs in each axis and direction for total of 60. There must be a delay between shock pulses long enough to allow the drive to complete all necessary error recovery procedures.
Page 75: Acoustics
7.8 Identification labels The following labels are affixed to every drive: • A label containing the Hitachi logo, the Hitachi Global Storage Technologies part number and the statement " Made by Hitachi Global Storage Technologies Inc." or Hitachi Global Storage Technol- ogies approved equivalent.
Page 76: Safety
United Nations Environment Program Montreal Protocol, and as ratified by the member nations. Material to be controlled include CFC-11, CFC-12, CFC-113, CFC-114, CFC-115, Halon 1211, Halon 1301 and Halon 2402. Although not specified by the Protocol, CFC-112 is also controlled. In addition to the Protocol Hitachi Global Stor- age Technologies requires the following: •...
Page 77: Electromagnetic Compatibility
The product is declared to be in conformity with requirements of the following EC directives under the sole responsibility of Hitachi Global Storage Technologies Japan Ltd: Council Directive 89/336/EEC on the approximation of laws of the Member States relating to electromagnetic compatibility.
Page 78 Deskstar 7K160 Hard Disk Drive Specification...
Page 79: General
8.0 General 8.1 Introduction This specification describes the host interface of the HDS7216xx0PLATy0 hard disk drive. The interface conforms to the Working Document of Information technology, AT Attachment with Packet Interface Extension (ATA/ATAPI-7) Revision 4, dated 23 December 2003, with certain limitations described in Section 8.3 below.
Page 80 Deskstar 7K160 Hard Disk Drive Specification...
Page 81: Registers
9.0 Registers 9.1 Register set Table 49: Register Set Addresses Functions CS0- CS1- READ (DIOR-) WRITE (DIOW-) Data bus high impedance Not used Control block registers Data bus high impedance Not used Data bus high impedance Not used Alternate Status Device Control Device Address Not used...
Page 82: Alternate Status Register
9.2 Alternate Status Register Table 50: Alternate Status Register DSC/ SERV This register contains the same information as the Status Register. The only difference between this register and the Status Register is that reading the Alternate Status Register does not imply an interrupt acknowledge or a clear of a pending interrupt.
Page 83: Data Register
9.6 Data Register This register is used to transfer data blocks between the device data buffer and the host. It is also the register through which sector information is transferred on a Format Track command and the configuration information is transferred on an Identify Device command.
Page 84: Drive Address Register
9.8 Drive Address Register Table 52: Drive Address Register -WTG -DS1 -DS0 This register contains the inverted drive select and head select addresses of the currently selected drive. Definitions High Impedance. This bit is not a device and will always be in a high impedance state. -WTG Write Gate.
Page 85: Error Register
9.10 Error Register Table 54: Error Register IDNF ABRT TK0NF AMNF This register contains the status from the last command executed by the device or a diagnostic code. At the comple- tion of any command, except Execute Device Diagnostic, the contents of this register are always valid even if ERR = 0 is in the Status Register.
Page 86: Sector Number Register
9.13 Sector Number Register This register contains the starting sector number for any disk data access for the subsequent command. The sector number is from one to the maximum number of sectors per track. In LBA mode, this register contains Bits 0–7. At the end of the command this register is updated to reflect the cur- rent LBA Bits 0–7.
Page 87 Definitions Busy. Bit BSY=1 whenever the device is accessing the registers. The host should not read or write any registers when BSY=1. If the host reads any register when BSY=1, the contents of the Status Register will be returned. DRDY Device Ready.
Page 88 Deskstar 7K160 Hard Disk Drive Specification...
Page 89: General Operation
10.0 General operation 10.1 Reset response ATA has the following three types of resets: The device executes a series of electrical circuitry diagnostics, spins up the Power On Reset (POR) head disk assembly, tests speed and other mechanical parametric, and sets default values.
Page 90: Register Initialization
10.2 Register initialization After a power on, a hard reset, or a software reset, the register values are initialized as shown in the table below. Table 57: Default Register Values Register Default Value Error Diagnostic Code Sector Count Sector Number Cylinder Low Cylinder High Device/Head...
Page 91: Diagnostic And Reset Considerations
10.3 Diagnostic and Reset considerations For each Reset and Execute Device Diagnostic, the diagnostic is done as follows: Power On Reset DASP– is read by Device 0 to determine if Device 1 is present. If Device 1 is present, Device 0 shall read PDIAG– to determine when it is valid to clear the BSY bit and whether Device 1 has powered on or reset without error, otherwise Device 0 clears the BSY bit whenever it is ready to accept commands.
Page 92: Sector Addressing Mode
10.4 Sector Addressing Mode All addressing of data sectors recorded on the device's media is done by a logical sector address. The logical CHS address for HDS7216x0PLATy0 is different from the actual physical CHS location of the data sector on the disk media.
Page 93: Power Management Features
10.5 Power management features The power management feature set permits a host to modify the behavior in a manner which reduces the power required to operate. The power management feature set provides a set of commands and a timer that enables a device to implement low power consumption modes.
Page 94: Interface Capability For Power Modes
10.5.4 Interface capability for power modes Each power mode affects the physical interface as defined in the following table: Table 60: Power conditions Mode Interface active Media Active Active Idle Active Standby Inactive Sleep Inactive Ready (RDY) is not a power condition. A device may post ready at the interface even though the media may not be accessible.
Page 95: Function
10.6 S.M.A.R.T. Function The intent of Self-monitoring, analysis, and reporting technology (S.M.A.R.T.) is to protect user data and prevent unscheduled system downtime that may be caused by predictable degradation and/or fault of the device. By monitoring and storing critical performance and calibration parameters, S.M.A.R.T. devices employ sophisticated data analysis algorithms to predict the likelihood of near-term degradation or fault condition.
Page 96: Error Log
10.6.7 Error log Logging of reported errors is supported. The device provides information on the last five errors that the device reported as described in the SMART error log sector. The device may also provide additional vendor specific information on these reported errors. The error log is not disabled when SMART is disabled. Disabling SMART disables the delivering of error log information via the SMART READ LOG SECTOR command.
Page 97: Security Mode Feature Set
10.7 Security Mode Feature Set Security Mode Feature Set is a powerful security feature. With a device lock password, a user can prevent unauthorized access to a device even if it is removed from the computer. New commands are supported for this feature as listed below: Security Set Password ('F1'h) Security Unlock...
Page 98: Passwords
10.7.3 Passwords This function can have two types of passwords as described below. Master Password When the Master Password is set, the device does NOT enable the Device Lock Function, and the device CANNOT be locked with the Master Password, but the Master Password can be used for unlocking the locked device.
Page 99 10.7.4.2 User Password setting When a User Password is set, the device will automatically enter lock mode the next time the device is powered on. < Setting password > < No setting password > Set Password with User Password Normal operation Normal operation Power off Power off...
Page 100 is successfully completed. Device Locked mode Unlock CMD Erase Prepare Media Access Non-media Access Command (*1) Command (*1) Erase Unit Password Password Match ? Match ? Reject Complete Enter Device Complete Unlock mode Erase Unit Lock function Disable Normal operation All commands are available Freeze Lock command Enter Device Frozen mode...
Page 101 10.7.4.4 User Password lost If the User Password is forgotten and High level security is set, the system user cannot access any data. However the device can be unlocked using the Master Password. If a system user forgets the User Password and Maximum security level is set, data access is impossible. However the device can be unlocked using the Security Erase Unit command to unlock the device and erase all user data with the Master Password.
Page 102: Command Table
10.7.5 Command table This table shows the device's response to commands when the Security Mode Feature Set (Device lock function) is enabled. Command Locked Mode Unlocked Mode Frozen Mode Check Power Mode Executable Executable Executable Configure Stream Command aborted Executable Executable Execute Device Executable...
Page 103 Security Erase Prepare Executable Executable Command aborted Security Erase Unit Executable Executable Command aborted Security Freeze Lock Command aborted Executable Executable Security Set Password Command aborted Executable Command aborted Security Unlock Executable Executable Command aborted Seek Executable Executable Executable Set Features Executable Executable Executable...
Page 104: Host Protected Area Feature
10.8 Host Protected Area Feature Host Protected Area Feature provides a protected area which cannot be accessed via conventional methods. This protected area is used to contain critical system data such as BIOS or system management information. The contents of the main memory of the entire system may also be dumped into the protected area to resume after a system power off.
Page 105: Security Extensions
3. Conventional usage without system software support Since the drive works as a 6.2 GB device, there is no special care required for normal use of this device. 4. Advanced usage using protected area The data in the protected area is accessed by the following steps. i.
Page 106: Seek Overlap
10.9 Seek overlap HDS7216x0PLATy0 provides an accurate method for measuring seek time. The seek command is usually used to measure the device seek time by accumulating the execution time for a number of seek commands. With typical implementation of seek command this measurement must include the device and host command overhead. To eliminate this overhead the drive overlaps the seek command as described below.
Page 107: Write Cache Function
10.10 Write cache function Write cache is a performance enhancement whereby the device reports the completion of the write command (Write Sectors, Write Multiple, and Write DMA) to the host as soon as the device has received all of the data into its buffer. The device assumes the responsibility for subsequently writing the data onto the disk.
Page 108: Reassign Function
10.11 Reassign function The Reassign function is used with read commands and write commands. The sectors of data for reassignment are prepared as the spare data sector. This reassignment information is registered internally and the information is available right after completing the Reassign function.
Page 109: Power-Up In Standby Feature Set
10.12 Power-Up in Standby feature set The Power-Up In Standby feature set allows devices to be powered-up into the Standby power management state to minimize inrush current at power-up and to allow the host to sequence the spin-up of devices. This feature set will be enabled and disabled via the SET FEATURES command or the use of a jumper.
Page 110: Advanced Power Management Feature Set (Apm)
10.13 Advanced Power Management feature set (APM) This feature allows the host to select an advanced power management level. The advanced power management level is a scale from the lowest power consumption setting of 01h to the maximum performance level of FEh. Device performance may increase with increasing advanced power management levels.
Page 111: Automatic Acoustic Management Feature Set (Aam)
10.14 Automatic Acoustic Management feature set (AAM) This feature set allows the host to select an acoustic management level. The acoustic management level may range from the lowest acoustic emanation setting of 01h to the maximum performance level of FEh. Device performance and acoustic emanation may increase with increasing acoustic management levels.
Page 112: Address Offset Feature
10.15 Address Offset Feature Computer systems perform initial code loading (booting) by reading from a predefined address on a drive. To allow an alternate bootable operating system to exist in a system reserved area on a drive, this feature provides a Set Features function to temporarily offset the drive address space.
Page 113: Identify Device Data
10.15.2 Identify Device Data Identify Device data, word 83, bit 7 indicates the device supports the Address Offset Feature. Identify Device data, word 86, bit 7 indicates the device is in Address Offset mode. 10.15.3 Exceptions in Address Offset Mode Any commands which access sectors across the original native maximum LBA are rejected with error, even if the access protection is removed by a Set Max Address command.
Page 114: 48-Bit Address Feature Set
10.16 48-bit Address Feature Set The 48-bit Address feature set allows devices with capacities up to 281,474,976,710,655 sectors. This allows device capacity up to 144,115,188,075,855,360 bytes. In addition, the number of sectors that may be transferred by a single command are increased by increasing the allowable sector count to 16 bits. Commands unique to the 48-bit Address feature set are •...
Page 115: Streaming Commands
• Read Stream DMA • Write Stream DMA • Read Log Ext Support of the Streaming feature set is indicated in Identify Device work 84 bit 4. Note that PIO versions of these commands limit the transfer rate (16.6 MB/s), provide no CRC protection, and limit status reporting as compared to a DMA implementation.
Page 116: Read Continuous Bit
10.17.5 Read Continuous bit If the Read Continuous bit is set to one for the command, the device shall transfer the requested amount of data to the host within the Command Completion Time Limit even if an error occurs. The data sent to the host by the device in an error condition is vendor specific.
Page 117: Comreset Preservation Requirements
equivalent to hardware reset, in the case of an asynchronous loss of signal some software settings may be lost without legacy software knowledge. In order to avoid losing important software settings without legacy driver knowledge, the software settings preservation ensures that the value of important software settings is maintained across a COMRESET.
Page 118: Sata Ii Optional Features
10.21 SATA II Optional Features There are several optional features defined in SATA II. The following shows whether these features are supported or not. 10.21.1 Asynchronous Signal Recovery The device supports asynchronous signal recovery defined in SATA II. 10.21.2 Device Power Connector Pin 11 Definition SATA II specification defines that Pin 11 of the power segment of the device connector may be used to provide the host with an activity indication and disabling of staggered spin-up.
Page 119 10.21.3.2 Counter Identifiers Each counter begins with a 16-bit identifier. Table 67 defines the counter value for each identifier. Any unused counter slots in the log page should have a counter identifier value of 0h. Optional counters that are not implemented shall not be returned in log page 11h. A value of '0' returned for a counter means that there have been no instances of that particular event.
Page 120: Read Log Ext Log Page 11H
10.21.3.3 Counter Definitions The counter definitions in this section specify the events that a particular counter identifier represents. 10.21.3.4 Identifier 000h There is no counter associated with identifier 000h. A counter identifier of 000h indicates that there are no additional counters in the log page. 10.21.3.5 Identifier 001h The counter with identifier 001h returns the number of commands that returned an ending status with the ERR bit set to one in the Status register and the ICRC bit set to one in the Error register.
Page 121: Sct Command Transport Feature Set
Counter n Identifier Counter n Value Counter n Lenght Reserved Data Structure Checksum Counter n Identifier Phy event counter identifier that corresponds to Counter n Value. Specifies the particular event counter that is being reported. The Identifier is 16 bits in length. Valid identifiers are listed in Table 68.
Page 122: Sct Command Protocol
There are two ways to access the log pages: using SMART READ/WRITE LOG and READ/WRITE LOG EXT. Both sets of commands access the same log pages and provide the same capabilities. The log directory for log pages E0h and E1h should report a length of one. The length of log page E1h does not indicate the length of an SCT data transfer.
Page 123 10.22.1.1 Issue SCT Command Using SMART Command Block Output Registers Register 7 6 5 4 3 2 1 0 Feature Sector Count Sector Number Cylinder Low Cylinder High Device/Head - - - D - - - Command Command Block Input Registers (Success) Command Block Input Registers (Error) Register 7 6 5 4 3 2 1 0...
Page 124 10.22.1.2 Issue SCT Command Using Write Log Ext Command Block Output Registers Register 7 6 5 4 3 2 1 0 Feature Current Reserved Previous Reserved Sector Count Current Previous LBA Low Current Previous Reserved LBA Mid Current Previous LBA High Current Reserved Previous...
Page 125 Byte Field Words Description Action Code This field defines the command type and generally specifies the type of data being accessed, such as sector, long sector, etc. or physical action being performed, such as seek. Function Code This field specifies the type of access, and varies by command.
Page 126 10.22.1.4 Extended Status Code Status Code Definition 0000h Command complete without error 0001h Invalid Function Code 0002h Input LBA out of range 0003h Request sector count overflow. The number of sectors requested to transfer (Sector Count register) in the read or write log command is larger than required by SCT command.
Page 127 10.22.1.6 Read/Write SCT Data Using SMART Command Block Output Registers Register 7 6 5 4 3 2 1 0 Feature D5h(Read)/D6h(Write) Sector Count Number of sectors to be transferred Sector Number Cylinder Low Cylinder High Device/Head - D - Command 10.22.1.7 Read/Write SCT Data Using Read/Write Log Ext Command Block Output Registers Register...
Page 128 Log page E0h contains the status information. Reading log page E0h retrieves the status information. The SCT status may be acquired any time that the host is allowing to send a command to the device. This command will not change the power state of the drive, nor terminate any background activity, including any SCT command in progress.
Page 129 10.22.1.11 Format of SCT Status Response Byte Type Field Name Value Description Word Format Version 0002h Status Response format version number Word SCT Version Manufacturer ’s vendor specific implementation version number Word SCT Spec. 0001h Highest level of SCT Technical Report supported DW ord Status Flags...
Page 130: Sct Command Set
10.22.2 SCT Command Set 10.22.2.1 Long Sector Access (action code: 0001h) Word Name Value Description Action Code 0001h Read or Write a sector with full ECC. This function is based on the obsolete ATA Read Long / Write Long capability, and has been extended beyond 28-bit addressing.
Page 131 10.22.2.2 LBA Segment Access (action code: 0002h) Word Name Value Description Action Code 0002h This action writes a pattern or sector of data repeatedly to the media. This capability could also be referred to as “Write All” or “Write Same”. Function Code 0001h Repeat Write Pattern (Background Operation)
Page 132 Flags in the SCT Status. SeeFigure 32) shall be set to 1. A write to any user addressable sector on the drive (except another complete write all), shall cause the Segment Initialized Flag to be cleared. Reallocations as a result of reading data (foreground or background) do not clear the Segment Initialized Flag.
Page 133 10.22.2.3 Error Recovery Control command (action code: 0003h) Word Name Value Description Action Code 0003h Set the read and write error recovery time Function Code 0001h Set New Value 0002h Return Current Value Selection Code 0001h Read Timer 0002h Write Timer Value Word If the function code is 0001h, then this field contains...
Page 134 10.22.2.4 Feature Control Command (action code: 0004h) Inputs (Key Sector) Word Name Value Description Action Code 0004h Set or return the state of drive features described in Error! Reference source not found. Function Code 0001h Set state for a feature 0002h Return the current state of a feature 0003h...
Page 135 Table 68: Feature Code List Feature Code State Definition 0001h 0001h : Allow write cache operation to be determined by Set Feature command 0002h : Force write cache enabled 0003h : Force write cache disabled If State 0001h is selected, the ATA Set Feature command will determine the operation state of write cache.
Page 136 Feature Code State Definition 0001h 0001h : Allow write cache operation to be determined by Set Feature command 0002h : Force write cache enabled 0003h : Force write cache disabled If State 0001h is selected, the ATA Set Feature command will determine the operation state of write cache.
Page 137 10.22.2.5 SCT Data Table Command (action code: 0005h) Word Name Value Description Action Code 0005h Read a data table Function Code 0001h Read Table Table ID Word See Error! Reference source not found. for a list of data tables 255:2 reserved 0000h Command Block Input Registers (Success)
Page 138 Byte Max Op Limit Maximum recommended continuous operating temperature. This is a one byte 2’s complement number that allows a range from -127°C to +127°C to be specified. 80h is an invalid value. This is a fixed value. Byte Over Limit Maximum temperature limit.
Page 139 Note 1 - The Absolute HDA Temperature History is preserved across power cycles with the requirement that when the drive powers up, a new entry is made in the history queue of 80h, an invalid absolute temperature value. This way an application viewing the history can see the discontinuity in temperature result from the drive being turned off.
Page 140 Deskstar 7K160 Hard Disk Drive Specification...
Page 141: Command Protocol
11.0 Command protocol The commands are grouped into different classes according to the protocols followed for command execution. The command classes with their associated protocols are defined below. For all commands, the host must first check to see if BSY = 1, and should proceed no further unless and until BSY = 0.
Page 142: Pio Data Out Commands
e. The host reads one sector (or block) of data via the Data Register. f. The device sets DRQ = 0 after the sector (or block) has been transferred to the host. 4. For the Read Long command: a. The device sets BSY = 1 and prepares for data transfer. b.
Page 143 • Write Multiple Ext • Write Sector(s) • Write Sector(s) Ext Execution includes the transfer of one or more 512 byte (> 512 bytes on Write Long) sectors of data from the host to the device. 1. The host writes any required parameters to the Features, Sector Count, Sector Number, Cylinder, and Device/Head Registers.
Page 144: Non-Data Commands
11.3 Non-data commands The following are Non-data commands: • Check Power Mode • Device Configuration FREEZE LOCK • Device Configuration RESTORE • Execute Device Diagnostic • Flush Cache • Flush Cache Ext • Idle • Idle Immediate • Initialize Device Parameters •...
Page 145: Dma Commands
11.4 DMA commands The following are DMA commands: • Read DMA • Read DMA Ext • Read Stream DMA • Write DMA • Write DMA Ext • Write Stream DMA Data transfers using DMA commands differ in two ways from PIO transfers: •...
Page 146 Deskstar 7K160 Hard Disk Drive Specification...
Page 147: Command Descriptions
12.0 Command descriptions The table below shows the commands that are supported by the device. Table 70: “Command Set (subcommand)” on page 136 shows the subcommands that are supported by each command or feature. Table 69: Command Set 6 5 4 3 2 1 0 Protocol (Hex) Command...
Page 148 6 5 4 3 2 1 0 Protocol Command (Hex) Read Sector(s) 0 0 1 Read Sector(s) 0 0 1 Read Sector(s) Ext 0 0 1 Read Stream DMA 0 0 1 Read Stream PIO 0 0 1 Read Verify Sector(s) 0 1 0 Read Verify Sector(s) 0 1 0...
Page 149 6 5 4 3 2 1 0 Protocol (Hex) Command Standby 1 1 1 Standby* 1 0 0 Standby Immediate 1 1 1 Standby Immediate* 1 0 0 Write Buffer 1 1 1 Write DMA 1 1 0 Write DMA 1 1 0 Write DMA Ext 0 0 1...
Page 150 Commands marked * are alternate command codes for previously defined commands Protocol: 1 : PIO data IN command 2 : PIO data OUT command 3 : Non data command 4 : DMA command + : Vendor specific command Table 70: Command Set (subcommand) Command Feature Command (Subcommand)
Page 151 The following symbols are used in the command descriptions. Output registers This indicates that the bit must be set to 0. This indicates that the bit must be set to 1. The device number bit. Indicates that the device number bit of the Device/Head Register should be specified.
Page 152: Check Power Mode (E5H/98H)
12.1 Check Power Mode (E5h/98h) Table 71: Check Power Mode command (E5h/98h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 153: Configure Stream (51H)
12.2 Configure Stream (51h) Table 72: Configure Stream (51h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - - Data High...
Page 154 Feature Current bit 7 (A/R) If set to one, a request to add a new stream. If cleared to zero, a request to remove a previous configured stream is specified. Feature Previous The default Command Completion Time Limit (CCTL). The value is calculated as follows: (Default CCTL) = ((content of the Features register)* (Identify Device words (99:98))) micriseconds.
Page 155: Device Configuration Overlay (B1H)
12.3 Device Configuration Overlay (B1h) Table 73: Check Power Mode Command (E5h/98h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 156: Device Configuration Identify (Subcommand C2H)
12.3.3 DEVICE CONFIGURATION IDENTIFY (subcommand C2h) The DEVICE CONFIGURATION IDENTIFY command returns a 512 byte data structure via PIO data-in transfer. The content of this data structure indicates the selectable commands, modes, and feature sets that the device is capable of supporting. If a DEVICE CONFIGURATION SET command has been issued reducing the capabilities, the response to an IDENTIFY DEVICE or IDENTIFY PACKET DEVICE command will reflect the reduced set of capabilities, while the DEVICE CONFIGURATION IDENTIFY command will reflect the entire set of selectable capabilities.
Page 157 Table 75: Device Configuration Overlay Data structure Word Content 0001h Data Structure revision Multiword DMA modes supported 15-3 Reserved 1 = Multiword DMA mode 2 and below are supported 1 = Multiword DMA mode 1 and below are supported 1 = Multiword DMA mode 0 is supported Ultra DMA modes supported 15-6 Reserved...
Page 158 Table 76: DCO error information definition Cylinder high invalid word location Cylinder low invalid bit location (bits 15:8)) Sector number invalid bit location (bits 7:0)) Sector count error reason code & description DCO feature is frozen Device is now Security Locked mode Device’s feature is already modified with DCO User attempt to disable any feature enabled Device is now SET MAX Locked or Frozen mode...
Page 159: Download Microcode (92H)
12.4 Download Microcode (92h) Table 77: Downlad Microcode Command (92h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 160 In reloading new microcode, the device does DASP handshake in reloading new microcode. Thus the device does not recognize the slave device even though it exists. Also when the spin-up of the device is disabled, the device spins down after reloading new microcode. A Features register value of 03h indicates that the microcode will be transferred in two or more Download Micro- code commands using the offset transfer method.
Page 161: Execute Device Diagnostic (90H)
12.5 Execute Device Diagnostic (90h) Table 78: Execute Device Diagnostic command (90h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 162: Flush Cache (E7H)
12.6 Flush Cache (E7h) Table 79: Flush Cache command (E7h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 163: Flush Cache Ext (Eah)
12.7 Flush Cache Ext (EAh) Table 80: Flush Cache Ext Command (EAh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - -...
Page 164: Format Track (50H)
12.8 Format Track (50h) Table 81: Format Track command (50h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 165 Input parameters from the device Sector Number In LBA mode this register specifies the current LBA address bits as 0–7 (L = 1). Cylinder High/Low In LBA mode this register specifies the current LBA address bits as 8–15 (Low) and bits 16–23 (High).
Page 166: Format Unit (F7H)
12.9 Format Unit (F7h) Table 82: Format Unit command (F7h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 167: Identify Device (Ech)
12.10 Identify Device (ECh) Table 83: Identify Device command (ECh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 168: Table 84: Identify Device Information
Table 84: Identify device information Word Content Description 045AH Drive classification, bit assignments: 15 (=0): 1=ATAPI device, 0=ATA device 045EH 14 - 8 : retired 7 (=0): 1=removable cartridge device 6 (=1): 1=fixed device 5 - 3 : retired 2 (=0): Response incomplete retired 0 (=0):...
Page 169 Description Word Content Capabilities, bit assignments: 4000H 15-14(=01) word 50 is valid 13- 1 (=0) Reserved Minimum value of Standby timer (=0) less than 5 minutes PIO data transfer cycle timing mode 0200H DMA data transfer cycle timing mode 0200H Refer Word 62 and 63 Validity flag of the word 0007H...
Page 170: Table 85: Identify Device Information
Table 85: Identify device information Word Content Description PATA – reserved 76-79 0000H 070xH SATA capabilities 15-11(=0) Reserved 10(=1) Phy event counters 9(=1) Receipt of host-initiated interface power management requests 8(=1) Native Command Queuing supported 7-3(=0) Reserved 2(=x) SATA Gen-2 speed (3.0Gbps) supported* 1(=1) SATA Gen-1 speed (1.5Gbps) supported 0(=0)
Page 171 Word Content Description 346BH Command 15 (=0) Reserved 14 (=0) NOP command 13 (=1) READ BUFFER command 12 (=1) WRITE BUFFER command 11 (=0) Reserved 10 (=1) Host Protected Area Feature Set 9 (=0) DEVICE RESET command 8 (=0) SERVICE interrupt 7 (=0) Release interrupt 6 (=1)
Page 172: Table 86: Identify Device Information
Table 86: Identify device information Word Content Description 7FEBH Command set supported 15-14(=01) Word 83 is valid 13 (=1) FLUSH CACHE EXT command supported 12 (=1) FLUSH CACHE command supported 11 (=1) Device Configuration Overlay command supported 10 (=1) 48-bit Address feature set supported 9 (=1) Automatic Acoustic Management 8 (=1)
Page 173: Table 87: Identify Device Information
Table 87: Identify device information Word Content Description xxxxH Command set/feature enabled Words 120:119 are valid. Reserved FLUSH CACHE EXT command supported FLUSH CACHE command supported Device Configuration Overlay command enabled 48-bit Address features set supported Automatic Acoustic Management enabled Set Max Security extensions enabled Set Features Address Offset mode Set Features subcommand required to spin-up...
Page 174: Table 88: Identify Device Information
Table 88: Identify device information Word Content Description 0x7FH Ultra DMA Transfer modes 15- 8(=xx) Current active Ultra DMA transfer mode Reserved (=0) Mode 6 1 = Active 0 = Not Active Mode 5 1 = Active 0 = Not Active Mode 4 1 = Active 0 = Not Active...
Page 175 Table 89: Identify device information Word Content Description xxxxH Current Automatic Acoustic Management value 15-8 Vendor's Recommended Acoustic Management level 7-0 Current Automatic Acoustic Management value Stream Minimum Request Size Number of sectors that provides optimum performance in streaming environment. This number xxxxH shall be a power of two, with a minimum of eight sectors (4096 bytes).
Page 176 An asterisk (*) in next to the Content field indicates the use of those parameters that are vendor specific Word 94-127 PATA Word Content Description xxxxH Current Automatic Acoustic Management value 15-8 Vendor's Recommended Acoustic Management level 7-0 Current Automatic Acoustic Management value Stream Minimum Request Size Number of sectors that provides optimum performance in streaming environment.
Page 177 Word 97-127 SATA (Both PATA and SATA) Word Content Description xxxxH Security status. Bit assignments 15-9 Reserved 8 Security Level 1= Maximum, 0= High 7-6 Reserved 5 Enhanced erase 1= Support 4 Expired 1= Expired 3 Freeze 1= Frozen 2 Lock 1= Locked 1 Enabled/Disable 1= Enable...
Page 178: Idle (E3H/97H)
12.11 Idle (E3h/97h) Table 90: Idle command (E3h/97h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 179: Idle Immediate (E1H/95H)
12.12 Idle Immediate (E1h/95h) Table 91: Idle Immediate command (E1h/95h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 180: Initialize Device Parameters (91H)
12.13 Initialize Device Parameters (91h) Table 92: Initialize Device Parameters command (91h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 181: Read Buffer (E4H)
12.14 Read Buffer (E4h) Table 93: Read Buffer (E4h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 182: Read Dma (C8H/C9H)
12.15 Read DMA (C8h/C9h) Table 94: Read DMA command (C8h/C9h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 183 Sector Number This indicates the sector number of the last transferred sector. (L = 0). In LBA mode this register contains the current LBA bits 0–7. (L = 1) Cylinder High/Low This indicates the cylinder number of the last transferred sector. (L = 0). In LBA mode this register contains the current LBA bits 8–15 (Low) and bits16–23 (High).
Page 184: Read Dma Ext (25H)
12.16 Read DMA Ext (25h) Table 95: Read DMA Ext Command (25h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - -...
Page 185 Cylinder High Current LBA (23:16) Cylinder High Previous LBA (47:40) Input parameters from the device Sector Number (HOB=0) LBA (7:0) of the address of the first unrecoverable error. Sector Number (HOB=1) LBA (31:24)of the address of the first unrecoverable error. Cylinder Low (HOB=0) LBA (15:8)of the address of the first unrecoverable error.
Page 186: Read Log Ext (2Fh)
12.17 Read Log Ext (2Fh) Table 96: Read Log Ext Command (2Fh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - -...
Page 187: Table 96: Log Address Definition
Table 97: Log Address Definition Log Address Content Feature set Type Log directory Read Only Extended Comprehensive SMART error log SMART error logging Ready Only SMART self-test log SMART self-test See Note Extended SMART self-test log SMART self-test Read Only Native Command Queu- Command Error Read Only...
Page 188: General Purpose Log Directory
12.17.1 General Purpose Log Directory The figure below defines the 512 bytes that make up the General Purpose Log Directory. Table 98: General Purpose Log Directory Description Bytes Offset General purpose logging version Number of sectors in the log at log address 01h (7:0) Number of sectors in the log at log address 01h (15:8) Number of sectors in the log at log address 01h (7:0) Number of sectors in the log at log address 01h (15:8)
Page 189: Extended Comprehensive Smart Error Log
12.17.2 Extended Comprehensive SMART Error Log The figure below defines the format of each of the sectors that comprise the Extended Comprehensive SMART error log. Error log data structure shall not include errors attributed to the receipt of faulty commands such as com- mand codes not implemented by the device or requests with invalid parameters or in valid addresses.
Page 190: Table 100: Command Data Structure
12.17.2.3.2 Data format of command data structure Table 101: Command data structure Description Bytes Offset Device Control register Features register (7:0) (see Note) Features register (15:8) Sector count register(7:0) Sector count register(15:8) Sector number register(7:0) Sector number register(15:8) Cylinder Low register (7:0) Cylinder Low register (15:8) Cylinder High register (7:0) Cylinder High register (15:8)
Page 191: Extended Self-Test Log Sector
Note: bits (7:0) refer to the contents if the register is read with bit 7 of the Device Control register cleared to zero. Bits (15:8) refer to the contents if the register is read with bit 7 of the Device Control register set to one. State shall contain a value indicating the state of the device when the command was issued to the device or the reset occurred as described below.
Page 192: Read Stream Error Log
12.17.3.1 Self-test log data structure revision number The value of this revision number shall be 01h. 12.17.3.2 Self-test descriptor index This indicates the most recent self-test descriptor. If there have been no self-tests, this is set to zero. Valid values for the Self-test descriptor index are 0 to 18.
Page 193 Table 103: Read Stream Error Log The Data Structure Version field shall contain a value of 02h indicating the second revision of the structure format. The Read Stream Error Log Count field shall contain the number of uncorrected sector entries currently reportable to the host.
Page 194: Write Stream Error Log
Table 110 defines the format of each entry in the Read Stream Error Log. Table 104: Stream Error Log entry Description Bytes Offset Feature Register Contents Value (current) Feature Register Contents Value (previous) Status Register Contents Value Error Register Contents Value LBA (7:0) LBA (15:8) LBA (23:16)
Page 195: Streaming Performance Log
Error Log Index and Write Stream Error Count cleared to zero. The Write Stream Error Log is not reserved across power cycles and hardware reset. Table 105: Write Stream Error Log Description Bytes Offset Structure Version Error Log Index Write Stream Error Log Count Reserved Write Stream Error Log Entry #1 Write Stream Error Log Entry #2...
Page 196: Table 105: Streaming Performance Parameters Log
The host should base its calculations on the larger of its Typical Host Interface Sector Time and the device reported Sector Time values, and on the sum of the device reported Access Time values and any additional latency that only the host is aware of (e.g.
Page 197: Read Long (22H/23H)
12.18 Read Long (22h/23h) Table 109: Read Long (22h/23h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 198 Input parameters from the device Sector Count This indicates the number of requested sectors not transferred Sector Number This indicates the sector number of the transferred sector. (L = 0) In LBA mode, this register contains current LBA bits 0–7. (L = 1) Cylinder High/Low This indicates the cylinder number of the transferred sector.
Page 199: Read Multiple (C4H)
12.19 Read Multiple (C4h) Table 110: Read Multiple (C4h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 200: Read Multiple Ext (29H)
12.20 Read Multiple Ext (29h) Table 111: Read DMA Ext Command (25h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - -...
Page 201 Input parameters from the device Sector Number (HOB=0) LBA (7:0) of the address of the first unrecoverable error. Sector Number (HOB=1) LBA (31:24) of the address of the first unrecoverable error. Cylinder Low (HOB=0) LBA (15:8) of the address of the first unrecoverable error. Cylinder Low (HOB=1) LBA (39:32) of the address of the first unrecoverable error.
Page 202: Read Native Max Address (F8H)
12.21 Read Native Max ADDRESS (F8h) Table 112: Read Native Max ADDRESS (F8h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - -...
Page 203: Read Native Max Address Ext (27H)
12.22 Read Native Max Address Ext (27h) Table 113: Read Native Max Address Ext command (27h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low...
Page 204: Read Sectors (20H/21H)
12.23 Read Sectors (20h/21h) Table 114: Read Sectors Command (20h/21h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 205 Cylinder High/Low This is the cylinder number of the last transferred sector. (L = 0) In LBA mode this register contains the current LBA bits 8–15 (Low) and bits 16–23 (High). (L = 1) This is the head number of the last transferred sector. (L = 0) In LBA mode this register contains the current LBA bits 24–27.
Page 206: Read Sector(S) Ext (24H)
12.24 Read Sector(s) Ext (24h) Table 115: Read Sector(s) Ext command (24h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - -...
Page 207 Input parameters from the device Sector Number (HOB=0) LBA (7:0) of the address of the first unrecoverable error. Sector Number (HOB=1) LBA (31:24) of the address of the first unrecoverable error. Cylinder Low (HOB=0) LBA (15:8) of the address of the first unrecoverable error. Cylinder Low (HOB=1) LBA (39:32) of the address of the first unrecoverable error.
Page 208: Read Stream Dma (2Ah)
12.25 Read Stream DMA (2Ah) Table 116: Read Stream DMA Command (2Ah) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - -...
Page 209 Output Parameters To The Device Feature Current URG specifies an urgent transfer request. The Urgent bit specifies that the command should be completed in URG (bit7) the minimum possible time by the device and shall be completed within the specified Command Completion Time Limit.
Page 210 Feature Current The time allowed for the current command's completion is calculated as follows: Command Completion Time Limit = (content of the Feature register Pre- vious) * (Identify Device words (99:98)) useconds If the value is zero, the device shall use the Default Feature Previous CCTL (7:0) CCTL supplied with a previous Configure Stream command for this Stream ID.
Page 211 Feature Current SE (Stream Error) shall be set to one if an error has occurred during the execution of the command and the RC bit is set to one, In this case the LBA returned in the Sector Number registers shall be the address of the first sector in error, and the Sector Count registers shall contain the number of consecutive sectors that may SE (Status, bit 5)
Page 212: Read Stream Pio (2Bh)
12.26 Read Stream PIO (2Bh) Table 117: Read Stream PIO (2Bh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - - Data High...
Page 213 the device shall attempt to transfer the amount of data requested within the Command Completion Time Limit event if some data transferred is in error. Output Parameters To The Device Feature Current URG specifies an urgent transfer request. The Urgent bit specifies that the command should be completed in the minimum URG (bit7) possible time by the device and shall be completed within the...
Page 214 Feature Current The number of continuous sectors to be transferred low order, Sector Count Current bits (7:0) The number of continuous sectors to be transferred high Sector Count Previous order, bits (15:8). If zero is specified in the Sector Count register, then 65,536 sectors will be transferred.
Page 215: Read Verify Sectors (40H/41H)
12.27 Read Verify Sectors (40h/41h) Table 118: Read Verify Sectors (40h/41h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 216 Cylinder High/Low This is the cylinder number of the last transferred sector. (L = 0) In LBA mode this register contains the current LBA bits 8–15 (Low) and bits 16–23 (High). (L = 1) This is the head number of the last transferred sector. (L = 0) In LBA mode this register contains the current LBA bits 24–27.
Page 217: Read Verify Sectors Ext (42H)
12.28 Read Verify Sectors Ext (42h) Table 119: Read Verify Sectors Ext command (42h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low...
Page 218 Input parameters from the device Sector Number (HOB=0) LBA (7:0) of the address of the first unrecoverable error. Sector Number (HOB=1) LBA (31:24) of the address of the first unrecoverable error. Cylinder Low (HOB=0) LBA (15:8) of the address of the first unrecoverable error. Cylinder Low (HOB=1) LBA (39:32) of the address of the first unrecoverable error.
Page 219: Recalibrate (1Xh)
12.29 Recalibrate (1xh) Table 120: Recalibrate (1xh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 220: Security Disable Password (F6H)
12.30 Security Disable Password (F6h) Table 121: Security Disable Password (F6h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 221: Security Erase Prepare
12.31 Security Erase Prepare Table 123: Security Disable Password (F3h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 222: Security Erase Unit (F4H)
12.32 Security Erase Unit (F4h) Table 124: Security Erase Unit (F4h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 223 At this time the defective sector information and the reassigned sector information for the device are not updated. The security erase prepare command should be completed immediately prior to the Security Erase Unit command. If the device receives a Security Erase Unit command without a prior Security Erase Prepare command the device aborts the security erase unit command.
Page 224: Security Freeze Lock (F5H)
12.33 Security Freeze Lock (F5h) Table 126: Security Freeze Lock command (F5h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 225: Security Set Password (F1H)
12.34 Security Set Password (F1h) Table 127: Security Set Password command (F1h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 226 Security Level Zero indicates High level. One indicates Maximum level. If the host sets High level and the password is forgotten, the Master Password can be used to unlock the device. If the host sets Maximum level and the user password is for- gotten, only a Security Erase Prepare/Security Unit command can unlock the device and all data will be lost.
Page 227: Security Unlock (F2H)
12.35 Security Unlock (F2h) Table 129: Security Unlock command (F2h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 228 The user can detect if the attempt to unlock the device has failed due to a mismatched password since this is the only reason that an abort error will be returned by the drive AFTER the password information has been sent to the device.
Page 229: Seek (7Xh)
12.36 Seek (7xh) Table 130: Seek command (7xh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 230: Set Features (Efh)
12.37 Set Features (EFh) Table 131: Set Features command (EFh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 231: Set Transfer Mode
Note: After the power on reset or hard reset the device is set to the following features as default. Write cache Enable ECC bytes 4 bytes Read look-ahead Enable Reverting to power on defaults Disable Release interrupt Disable 12.37.1 Set Transfer mode When the Feature register is 03h (= Set Transfer mode) the Sector Count Register specifies the transfer mechanism.
Page 232 When Low RPM standby mode is the deepest Power Saving mode and the value in Sector Count register is between 40h and 7Fh, 120 ☯y ☯435 [sec] (default: 120 [sec]) = (x − 40h) 60 +600 (600 ☯y ☯4380) [sec] When Low RPM standby mode is the deepest Power Saving Mode and the value in Sector Count register is between 01h and 3Fh, where...
Page 233: Automatic Acoustic Management
12.37.4 Automatic Acoustic Management When Feature register is 42h (= Enable Automatic Acoustic Management), the Sector Count Register specifies the Automatic Acoustic Management level. Aborted C0-FEh Set to Normal Seek mode 80-BFh Set to Quiet Seek mode 00- 7Fh Aborted The device preserves enabling or disabling of Automatic Acoustic Management and the current Automatic Acous- tic Management level setting across all forms of reset, that is, Power on, Hardware, and Software Resets.
Page 234: Set Max Address (F9H)
12.38 Set Max ADDRESS (F9h) Table 132: Set Max ADDRESS command (F9h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 235 changed to the native maximum address, the value placed in words (61:60) shall be 268,435,455 and the value placed in words (103:100) shall be the native maximum address. If a host protected area has been established by a Set Max Address Ext command, the device shall return command aborted.
Page 236: Set Max Set Password (Feature=01H)
12.38.1 Set Max Set Password (Feature=01h) Table 133: Set Max Set Password command Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - -...
Page 237: Set Max Lock (Feature=02H)
12.38.2 Set Max Lock (Feature=02h) Table 135: Set Max Lock command Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 238: Set Max Unlock (Feature = 03H)
12.38.3 Set Max Unlock (Feature = 03h) Table 136: Set Max Unlock command (F9h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data...
Page 239: Set Max Freeze Lock (Feature = 04H)
12.38.4 Set Max Freeze Lock (Feature = 04h) Table 137: Set Max Freeze Lock (F9h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data...
Page 240: Set Max Address Ext (37H)
12.39 Set Max Address Ext (37h) Table 138: Set Max Address Ext command (37h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low...
Page 241 Output parameters to the device Option bit for selection whether nonvolatile or volatile. B=0 is volatile condition. When B=1, MAX Address which is set by the Set Max Address Ext command is preserved by POR. When B=0, MAX Address which is set by the Set Max Address Ext command will be lost by POR.
Page 242: Set Multiple (C6H)
12.40 Set Multiple (C6h) Table 139: Set Multiple command (C6h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 243: Sleep (E6H/99H)
12.41 Sleep (E6h/99h) Table 140: Sleep command (E6h/99h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 244: Function Set (B0H)
12.42 S.M.A.R.T. Function Set (B0h) Table 141: S.M.A.R.T. Function Set command (B0h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 245: Function Subcommands
12.42.1 S.M.A.R.T. Function Subcommands Code Subcommand S.M.A.R.T. Read Attribute Values S.M.A.R.T. Read Attribute Thresholds S.M.A.R.T. Enable/disable Attribute Autosave S.M.A.R.T. Save Attribute Values S.M.A.R.T. Execute Off-line Immediate S.M.A.R.T. Read Log Sector S.M.A.R.T. Write Log Sector S.M.A.R.T. Enable Operations S.M.A.R.T. Disable Operations S.M.A.R.T.
Page 246 12.42.1.4 S.M.A.R.T. Save Attribute Values (subcommand D3h) This subcommand causes the device to immediately save any updated Attribute Values to the device's Attribute Data sector regardless of the state of the Attribute Autosave feature. Upon receipt of the S.M.A.R.T. Save Attribute Values subcommand from the host, the device asserts BSY, writes any updated Attribute Values to the Attribute Data sector, clears BSY, and asserts INTRQ.
Page 247 Log directory Read Only S.M.A.R.T. Error Log Read Only Extended Comprehensive SMART Error See note S.M.A.R.T. Self-test Log Read Only Extended Self-test Log See note Selective self-test Log Read/Write 80h-9Fh Host vendor specific Read/Write Note: Log addresses 03h and 07h are used by the Read Log Ext and Write Log Ext commands. If these log addresses are used with the SMART Read Log Sector command, the device shall return command aborted.
Page 248 12.42.1.10 S.M.A.R.T. Return Status (subcommand DAh) This command is used to communicate the reliability status of the device upon the request of the host. Upon receipt of the SMART Return Status subcommand the device saves any updated Pre-failure type Attribute Values to the reserved sector and compares the updated Attribute Values to the Attribute Thresholds.
Page 249: Device Attribute Data Structure
12.42.2 Device Attribute Data Structure The following defines the 512 bytes that make up the Attribute Value information. This data structure is accessed by the host in its entirety using the S.M.A.R.T. Read Attribute Values subcommand. All multibyte fields shown in these data structures are in byte ordering, that is, the least significant byte occupies the lowest numbered byte address location in the field.
Page 250 Attribute ID Numbers: Any nonzero value in the Attribute ID Number indicates an active attribute. The device supports following Attribute ID Numbers. Attribute Name Indicates that this entry in the data structure is not used Raw Read Error Rate Throughput Performance Spin Up Time Start/Stop Count Reallocated Sector Count...
Page 251 Bit 7 Automatic Off-line Data Collection Status Automatic Off-line Data Collection is disabled. Automatic Off-line Data Collection is enabled. Bits 0–6 represent a hexadecimal status value reported by the device. Value Definition Off-line data collection never started. All segments completed without errors. Off-line data collection is suspended by the interrupting command.
Page 252: Device Attribute Thresholds Data Structure
Off-line Read Scanning implemented bit The device does not support Off-line Read Scanning The device supports Off-line Read Scanning Self-test implemented bit Self-test routing is not implemented Self-test routine is implemented Reserved (0) Selective self-test routine is not implemented 0 Selective self-test routine is not implemented 1 Selective self-test routine is implemented 12.42.2.7 S.M.A.R.T.
Page 253: Table 143: Device Attribute Thresholds Data Structure
The sequence of active Attribute Thresholds will appear in the same order as their corresponding Attribute Values. Table 144: Device Attribute Thresholds Data Structure Description Byte Offset Value Data Structure Revision Number 0010h 1st Device Attribute 30th Device Attribute 15Eh Reserved 16Ah Vendor specific...
Page 254: Log Directory
12.42.4 S.M.A.R.T. Log Directory The following table defines the 512 bytes that make up the S.M.A.R.T. Log Directory. The S.M.A.R.T. Log Direc- tory is S.M.A.R.T. Log Address zero and is defined as one sector long. Table 146: S.M.A.R.T. Log Directory Description Byte Offset...
Page 255: Table 147: Error Log Data Structure
12.42.5.4 Error log data structure The data format of each error log data structure is shown below. Table 148: Error log data structure Description Byte Offset 1st command data structure 2nd command data structure 3rd command data structure 4th command data structure 5th command data structure Error data structure 12.42.5.5 Command data structure...
Page 256: Self-Test Log Data Structure
Life time stamp (hours) The state field contains a value indicating the device state when command was issued to the device. Value State Unknown Sleep Standby Active/Idle S.M.A.R.T. Off-line or Self-test x5h-xAh Reserved xBh-xFh Vendor specific The value of ’x’ is vendor specific 12.42.6 Self-test log data structure The following table defines the 512 bytes that make up the Self-test log sector.
Page 257: Selective Self-Test Log Data Structure
12.42.7 Selective self-test log data structure The Selective self-test log is a log that may be both written and read by the host. This log allows the host to select the parameters for the self-test and to monitor the progress of the self-test. The following table defines the contents Deskstar 7K160 Hard Disk Drive Specification...
Page 258: Error Reporting
of the Selective self-test log which is 512 bytes long. All multi-byte fields shown in these data structures follow the ATA/ATAPI-7 specifications for byte ordering. Table 152: Selective self-test log data structure Description Bytes Offset Read/Write Data structure revision Starting LBA for test span 1 Ending LBA for test span 1 Starting LBA for test span 2 Ending LBA for test span 2...
Page 259 A S.M.A.R.T. FUNCTION SET command subcommand other than S.M.A.R.T. ENABLE OPERATIONS was received by the device while the device was in a "S.M.A.R.T. Disabled" state. The device is unable to read its Attribute Values or 10h or 40h Attribute Thresholds data structure The device is unable to write to its Attribute Values data structure.
Page 260: Standby (E2H/96H)
12.43 Standby (E2h/96h) Table 154: Standby (E2h/96h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 261 When the automatic power down sequence is enabled, the device will enter the Standby mode automatically if the time-out interval expires with no device access from the host. The time-out interval will be reinitialized if there is a drive access before the time-out interval expires. Deskstar 7K160 Hard Disk Drive Specification...
Page 262: Standby Immediate (E0H/94H)
12.44 Standby Immediate (E0h/94h) Table 155: Standby Immediate (E0h/94h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 263: Write Buffer (E8H)
12.45 Write Buffer (E8h) Table 156: Write Buffer (E8h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 264: Write Dma (Cah/Cbh)
12.46 Write DMA (CAh/CBh) Table 157: Write DMA (CAh/CBh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 265 Sector Number This indicates the sector number of the last transferred sector. (L = 0) In LBA mode this register contains the current LBA bits 0–7. (L = 1) Cylinder High/Low This indicates the cylinder number of the last transferred sector. (L = 0) In LBA mode this register contains the current LBA bits 8–15 (Low) and bits 16–23 (High).
Page 266: Write Dma Ext (35H)
12.47 Write DMA Ext (35h) Table 158: Write DMA Ext Command (35h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - -...
Page 267 Cylinder High Current LBA (23:16) Cylinder High Previous LBA (47:40) Input parameters from the device Sector Number (HOB=0) LBA (7:0) of the address of the first unrecoverable error. Sector Number (HOB=1) LBA (31:24) of the address of the first unrecoverable error. Cylinder Low (HOB=0) LBA (15:8) of the address of the first unrecoverable error.
Page 268: Write Dma Fua Ext (3Dh)
12.48 Write DMA FUA Ext (3Dh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - - Data High...
Page 269 Cylinder High Current LBA (23:16) Cylinder High Previous LBA (47:40) Input parameters from the device Sector Number (HOB=0) LBA (7:0) of the address of the first unrecoverable error. Sector Number (HOB=1) LBA (31:24) of the address of the first unrecoverable error. Cylinder Low (HOB=0) LBA (15:8) of the address of the first unrecoverable error.
Page 270: Write Log Ext (3Fh)
12.49 Write Log Ext (3Fh) Table 159: Write Log Ext Command (3Fh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - -...
Page 271: Write Long (32H/33H)
12.50 Write Long (32h/33h) Table 160: Write Long (32h/33h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 272 Cylinder High/Low This indicates the cylinder number of the sector to be transferred. (L = 0) In LBA mode this register contains current the LBA bits 8–15 (Low) and bits 16–23 (High). (L = 1) This indicates the head number of the sector to be transferred. (L = 0) In LBA mode this register contains current the LBA bits 24–27.
Page 273: Write Multiple (C5H)
12.51 Write Multiple (C5h) Table 161: Write Multiple (C5h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 274 Cylinder High/Low This indicates the cylinder number of the last transferred sector. (L = 0) In LBA mode this register contains the current LBA bits 8–15 (Low) and bits 16–23 (High). (L = 1) This indicates the head number of the last transferred sector. (L = 0) In LBA mode this register contains current the LBA bits 24–27.
Page 275: Write Multiple Ext (39H)
12.52 Write Multiple Ext (39h) Table 162: WriteMultiple Ext Command (39h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - - Data High...
Page 276 Input parameters from the device Sector Number (HOB=0) LBA (7:0) of the address of the first unrecoverable error. Sector Number (HOB=1) LBA (31:24) of the address of the first unrecoverable error. Cylinder Low (HOB=0) LBA (15:8) of the address of the first unrecoverable error. Cylinder Low (HOB=1) LBA (39:32) of the address of the first unrecoverable error.
Page 277: Writer Multiple Fua Ext (Ceh)
12.53 Writer Multiple FUA Ext (CEh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - - Data High...
Page 278 Input parameters from the device Sector Number (HOB=0) LBA (7:0) of the address of the first unrecoverable error. Sector Number (HOB=1) LBA (31:24) of the address of the first unrecoverable error. Cylinder Low (HOB=0) LBA (15:8) of the address of the first unrecoverable error. Cylinder Low (HOB=1) LBA (39:32) of the address of the first unrecoverable error.
Page 279: Write Sectors (30H/31H)
12.54 Write Sectors (30h/31h) Table 163: Write Sectors command (30h/31h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 280 Cylinder High/Low This indicates the cylinder number of the last transferred sector. (L = 0) In LBA mode this register contains the current LBA bits 8–15 (Low) and 16–23 (High). (L = 1) This indicates the head number of the last transferred sector. (L = 0) In LBA mode this register contains the current LBA bits 24–27.
Page 281: Write Sector(S) Ext (34H)
12.55 Write Sector(s) Ext (34h) Table 164: Write Sectors Ext Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - - Data High...
Page 282 Input parameters from the device Sector Number (HOB=0) LBA (7:0) of the address of the first unrecoverable error. Sector Number (HOB=1) LBA (31:24) of the address of the first unrecoverable error. Cylinder Low (HOB=0) LBA (15:8) of the address of the first unrecoverable error. Cylinder Low (HOB=1) LBA (39:32) of the address of the first unrecoverable error.
Page 283: Write Stream Dma (3Ah)
12.56 Write Stream DMA (3Ah) Table 165: Write Stream DMA Command (3Ah) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - -...
Page 284 Output Parameters To The Device Feature Current URG (bit7) URG specifies an urgent transfer request. The Urgent bit specifies that the command should be completed in the minimum possible time by the device and shall be completed within the specified Command Completion Time Limit. WC (bit6) WC specifies Write Continuous mode enabled.
Page 285: Write Stream Pio (3Bh)
12.57 Write Stream PIO (3Bh) Table 166: Write Stream PIO Command (3Bh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - -...
Page 286 Output Parameters To The Device Feature Current URG (bit7) URG specifies an urgent transfer request. The Urgent bit specifies that the command should be completed in the minimum possible time by the device and shall be completed within the specified Command Completion Time Limit. WC (bit6) WC specifies Write Continuous mode enabled.
Page 287 Input Parameters From The Device Sector Number (HOB=0) LBA (7:0) of the address of the first unrecoverable error. Sector Number (HOB=1) LBA (31:24) of the address of the first unrecoverable error. Cylinder Low (HOB=0) LBA (15:8) of the address of the first unrecoverable error. Cylinder Low (HOB=1) LBA (39:32) of the address of the first unrecoverable error.
Page 288 Deskstar 7K160 Hard Disk Drive Specification...
Page 289: Timings
13.0 Timings The timing of BSY and DRQ in Status Register are shown in the table below. Table 167: Time-out values INTERVAL START STOP TIME-OUT Power On Device Busy After Power On Status Register BSY=1 400 ns Power On Device Ready After Power On Status Register BSY=1 31 sec...
Page 290 Index 15 logical head default ....................46 48-bit Address Feature ....................100 48-bit Address Feature Set ....................100 Abbreviations ........................1 Acoustics .........................61 Actuator ..........................9 Address Offset ........................98 Address Offset Feature ....................98 Addressing of registers ....................40 Advanced Power Managemen ..................96 Advanced Power Management feature set (APM) ............96 Alternate Status Register ....................68 Asynchronous Signal Recovery ..................104 AT signal connector ......................22...
Page 291 Command overhead ......................15 Command protocol ......................127 Command Register ......................68 Command table .......................88 COMRESET Preservation Requirements ...............103 Configure Stream ......................139 Connector location ......................21 Connector locations ......................57 Control electronics ......................9 Corrosion test ........................50 Counter Definitions ......................106 CSA approval ........................62 C-TICK mark ........................63 Cylinder allocation ......................12, 13 Cylinder High Register ....................68 Cylinder Low Register ....................68...
Page 292 Drive ready time ......................17 Electrical interface ......................21 Electrical interface specification ..................21 Electromagnetic compatibility ..................62, 63 Enable/Disable Address Offset Mode ................98 Environment ........................49, 62 Error log ..........................82 Error Register ........................71 Exceptions in Address Offset Mode ................99 Features Register ......................71 Fixed-disk subsystem ......................9 Fixed-disk subsystem description ...................9 Flammability ........................62 Flush Cache ........................148...
Page 293 Humidity .........................49 humidity ..........................49 Identification labels ......................61 Identifier 000h .........................106 Identifier 001h .........................106 Identify Device Data .......................99 Initiating Read DMA ......................32 Initiating Write DMA .....................36 Input voltage ........................51 Interface capability for power modes ................80 Interface connector ......................22 Interface logic signal levels ....................27 Interface specification .....................41 Introduction ........................1 Jumper pin assignment ....................44...
Page 294 Mounting hole locations ....................55, 56 Mounting orientation ......................58 Multi word DMA timings ....................31 Non-data commands .......................130 Nonoperating rotational shock ..................60 Nonoperating shock ......................60 Nonoperating vibration ....................59 Nonrecovered write errors ....................94 Not Sequential bit ......................101 Off-line read scanning ....................81 Operating modes ......................17 Operating shock ......................60 Operating vibration ......................59 Operation example ......................84...
Page 295 Random vibration ......................59 Read Continuous bit ......................102 Read DRQ interval time ....................30 READ LOG EXT Log Page 11h ..................106 Reassign function ......................94 References ........................1 Register initialization ......................76 Register set ........................67 Registers ..........................67 Reliability ........................54 Required power-off sequence ..................54 Reset response .........................75 Reset timings ........................27 RX+ / RX- ........................28 S.M.A.R.T.
Page 296 Service life ........................54 Set Max security extension commands ................91 Shock ..........................59 Signal definition (SATA model) ..................27 Signal definitions ......................23 Signal definitions (PATA model) ...................23 Signal descriptions ......................24 Software Setting Preservation ..................102 Specification ........................43 Standby timer ........................79 Start/stop cycles ......................54 Status Register ........................72 Streaming commands ......................101 Streaming feature Set ......................100 Streaming Logs .......................102...
Page 297 Write Buffer ........................249 Write cache function .......................93 Write Continuous bit .......................102 Write DRQ interval time ....................30...
Page 298 References in this publication to Hitachi Global Storage Technologies products, programs or services do not imply that Hitachi Global Storage Technologies intends to make these available in all countries in which Hitachi Global Storage Technologies operates. Product information is provided for information pur- poses only and does not constitute a warranty.

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Hitachi HTS542525K9SA00 Specifications

General

General Features of the Drive

Fixed-Disk Subsystem Description

Drive Characteristics

Defect Flagging Strategy

Electrical Interface Specification

Specification

General

Registers

General Operation

Command Protocol

Command Descriptions

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