Service Processor Checkpoints
Service processor checkpoints are in the range 8xxx to Bxxx. OK in the primary I/O
drawer's operator panel indicates successful service processor testing and initialization.
Firmware checkpoints are listed in "Firmware Checkpoints" on page 147.
Note: A spinning (or twirling) slash will be shown in the upper right corner of the
Table 1. Service Processor Checkpoints
Checkpoint
8000
8004
8008
8009
800F
8010
8012
8014
8016
8018
801A
801B
801C
801F
809x
8092
8098
809C
809F
8100
140
Service Guide
operator panel display while some checkpoints are being displayed. If the slash
stops spinning, a hang condition is indicated.
Description
Test of the service processor
DRAM
Verify base code checksum
Verify base code mirror checksum
Set NVRAM configuration in TITAN
Start base code
Start supervisor in base code
Initialize hardware interrupts
Allocate and initialize area in DRAM See note 1 on page 144
Initialize debugger and build VPD
Initialize service processor
interfaces
Initialize external FLASH load
Initialize and test ISA hub chip
Initialize and test SUPER I/O chip
Initialize diskette, verify VDASD and
start operational loader
Related to recovery mode system
firmware update from diskette
Diskette initialization during
recovery mode system firmware
update
Firmware image being read during
recovery mode system firmware
update
Firmware image being written
during recovery mode system
firmware update
Diskette error during recovery mode
system firmware update
Start operational loader
Action/
Possible Failing FRU
See note 1 on page 144
See note 1 on page 144
See note 1 on page 144
See note 1 on page 144
See note 1 on page 144
See note 1 on page 144
See note 1 on page 144
See note 1 on page 144
See note 1 on page 144
See note 1 on page 144
See note 1 on page 144
See note 1 on page 144
See note 1 on page 144
See note 3 on page 144
See note 3 on page 144
See note 3 on page 144
See note 3 on page 144
See note 3 on page 144
See note 1 on page 144