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IBM IC25N040ATCS04 - Travelstar 40 GB Hard Drive Specifications
IBM IC25N040ATCS04 - Travelstar 40 GB Hard Drive Specifications

IBM IC25N040ATCS04 - Travelstar 40 GB Hard Drive Specifications

2.5 inch ata/ide hard disk drive
Table of Contents

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IBM storage products - official published specifications

Hard disk drive specifications

Travelstar 60GH & 40GN
2.5 inch ATA/IDE hard disk drive
Models:
IC25T060ATCS05
IC25N040ATCS04
IC25N030ATCS04
IC25N020ATCS04
IC25N010ATCS04
Revision 3.0
S07N-7681-09
IBM
22 January 2002
Publication # 1540

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Summary of Contents for IBM IC25N040ATCS04 - Travelstar 40 GB Hard Drive

  • Page 1: Hard Disk Drive Specifications

    IBM storage products - official published specifications Hard disk drive specifications Travelstar 60GH & 40GN 2.5 inch ATA/IDE hard disk drive Models: IC25T060ATCS05 IC25N040ATCS04 IC25N030ATCS04 IC25N020ATCS04 IC25N010ATCS04 Revision 3.0 22 January 2002 S07N-7681-09 Publication # 1540...
  • Page 2 Hard disk drive specifications Travelstar 60GH & 40GN 2.5 inch ATA/IDE hard disk drive Models: IC25T060ATCS05 IC25N040ATCS04 IC25N030ATCS04 IC25N020ATCS04 IC25N010ATCS04 Revision 3.0 22 January 2002 S07N-7681-09 Publication # 1540...
  • Page 3 IBM may have patents or pending patent applications covering subject matter in this document. The furnishing of this document does not give you any license to these patents. You can send license inquiries, in writing, to the IBM Director of Commercial Relations, IBM Corporation, Armonk, NY 10577.
  • Page 4: Table Of Contents

    Table of contents ..............Figures .
  • Page 5 ..........6.4.5 Preventive maintenance .
  • Page 6 ............8.2 Terminology .
  • Page 7 ..........11.10 Protected Area Function .
  • Page 8 ........13.32 S.M.A.R.T.
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  • Page 10: Figures

    Figures ..........Figure 1.
  • Page 11 ........... . Figure 50.
  • Page 12 ........Figure 104. Recalibrate command (1xh) .
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  • Page 14: General

    1.0 General This document describes the specifications of the IBM Travelstar 60GH & 40GN, a 2.5-inch hard disk drive with ATA/IDE interface: Drive name Model Number Capacity (GB) Height (mm) Rotation speed (rpm) Travelstar 60GH IC25T060ATCS05 12.5 5,400 Travelstar 40GN...
  • Page 15 hertz Input integrated lead suspension imped impedance Input/Output International Standards Organization 1,000 bytes Kbpi 1,000 Bit Per Inch kgf-cm kilogram (force)-centimeter kilohertz logical block addressing unit of A-weighted sound power meter max. or Max. maximum 1,000,000 bytes Mbps 1,000,000 Bit per second Mb/sec 1,000,000 Bit per second MB/sec...
  • Page 16: References

    1.2 References ATA/ATAPI-5 (T13/1321D Revision 3) 1.3 General caution Do not apply force to the top cover (See figure below). Do not cover the breathing hole on the top cover (See figure below). Do not touch the interface connector pins or the surface of the printed circuit board. The drive can be damaged by shock or ESD (Electric Static Discharge).
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  • Page 18: General Features

    2.0 General features " 2.5-inch, 12.5- and 9.5-mm Height Compliance " Formatted capacities of 60 GB, 40 GB, 30 and 10 " 512 bytes/sector " Interface (Enhanced ) conforming to ATA/ATAPI-5 " Integrated controller " No-ID recording format " Coding : 96/104 MTR "...
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  • Page 20: Part 1. Functional Specification

    Part 1. Functional specification Travelstar 60GH & 40GN hard disk drive specifications...
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  • Page 22: Fixed Disk Subsystem Description

    3.0 Fixed disk subsystem description 3.1 Control Electronics The control electronics works with the following functions: ! AT Interface Protocol ! Embedded Sector Servo ! No-ID (TM) formatting ! Multizone recording ! Code: 96/104 MTR ! ECC On-The-Fly ! Enhanced Adaptive Battery Life Extender 3.2 Head disk assembly data The following technologies are used in the drive: ! Pico Slider...
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  • Page 24: Fixed Disk Characteristics

    4.0 Fixed disk characteristics 4.1 Formatted capacity by model number Description IC25T060ATCS05 IC25N040ATCS04 IC25N030ATCS04 Physical Layout Bytes per Sector Sectors per Track low TPI format 360–672 360–672 307–556 high TPI format 336–648 336–648 Number of Heads Number of Disks Logical Layout Number of Heads Number of Sectors/ Track Number of Cylinders...
  • Page 25: Data Sheet

    4.2 Data sheet All other 60-GB model models Rotational Speed (RPM) 5,400 4,200 130–245 Data transfer rates (buffer to/from media) (Mbps) 146–262 125–241 Data transfer rates (Mbyte/sec) ULTRA DMA 100 Recording density (Kbpi) (Max) 63.5 Track density (Ktpi) 60.4 66.4 Areal density (Gb/sq.in.- Max) Number of zones Figure 4.
  • Page 26: Figure 6. Cylinder Allocation - All Models Except 60 Gb (High Tpi Format)

    All other models - high TPI format Zone Cylinder No. of Sectors/Trk 0–511 512–2559 2560–4863 4864–9215 9216–11519 11520–13823 13824–16895 16896–19967 19968–21503 21504–24831 24832–27135 27136–28671 28672–31231 31232–33791 33792–37631 37632–39935 Figure 6. Cylinder allocation — all models except 60 GB (high TPI format) All other models - low TPI format Zone Cylinder...
  • Page 27: Performance Characteristics

    4.4 Performance characteristics Drive performance is characterized by the following parameters: ! Command Overhead ! Mechanical Positioning # Seek Time # Latency ! Data Transfer Speed ! Buffering Operation (Look ahead/Write Cache) Note: All the above parameters contribute to drive performance. There are other parameters which contri- bute to the performance of the actual system.
  • Page 28: Mechanical Positioning

    4.4.2 Mechanical positioning 4.4.2.1 Average seek time (including settling) Command Type Typical (ms) Max. (ms) Read Write Figure 9. Mechanical positioning performance Typical and Max. are defined throughout the performance specification as follows: Typical Average of the drive population tested at nominal environmental and voltage conditions. Max.
  • Page 29: Figure 11. Single Track Seek Time

    4.4.2.3 Single track seek time (without command overhead, including settling) Command Type Typical (ms) Maximum (ms) Read Write Figure 11. Single track seek time Single track seek is measured as the average of one (1) single track seek from every track in both directions (inward and outward).
  • Page 30: Operating Modes

    4.4.3 Operating modes Operating mode Description Spin-Up Start up time period from spindle stop or power down. Seek Seek operation mode Write Write operation mode Read Read operation mode Performance The device is capable of responding immediately to idle media access requests. All electronic components remain powered and the full frequency servo remains operational.
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  • Page 32: Data Integrity

    5.0 Data integrity 5.1 Data loss on power off ! Data loss will not be caused by a power off during any operation except the write operation. ! A power off during a write operation causes the loss of any received or resident data that has not been written onto the disk media.
  • Page 33: Write Safety

    5.4 WRITE safety The drive ensures that the data is written into the disk media properly. The following conditions are moni- tored during a write operation. When one of these conditions exceeds the criteria, the write operation is terminated and the automatic retry sequence is invoked. ! Head off track ! External shock ! Low supply voltage...
  • Page 34: Ecc

    5.8 ECC The 40 byte three interleaved ECC processor provides user data verification and correction capability. The first 4 bytes of ECC are check bytes for user data and the other 36 bytes are Read Solomon ECC. Each interleave has 12 bytes for ECC. Hardware logic corrects up to 15 bytes (5 bytes for each interleave) errors on-the-fly.
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  • Page 36: Specification

    6.0 Specification 6.1 Environment 6.1.1 Temperature and humidity Operating conditions Temperature 5 to 55°C (See note below) Relative humidity 8 to 90% noncondensing Maximum wet bulb temperature 29.4°C noncondensing Maximum temperature gradient 20°C/hour Altitude –300 to 3048 m (10,000 ft) Nonoperating conditions Temperature –40 to 65°C...
  • Page 37: Radiation Noise

    6.1.1.1 Corrosion test The hard disk drive must be functional and show no signs of corrosion after being exposed to a temperature humidity stress of 50°C/90%RH (relative humidity) for one week followed by a temperature and humidity drop to 25°C/40%RH in 2 hours. 6.1.2 Radiation noise The disk drive shall work without degradation of the soft error rate under the following magnetic flux density limits at the enclosure surface.
  • Page 38: Dc Power Requirements

    6.2 DC power requirements Connection to the product should be made in a safety extra low voltage (SELV) circuits. The voltage specifications are applied at the power connector of the drive. Item Requirements Nominal supply +5 Volt dc Supply voltage –0.3 Volt to 6.0 Volt 100 mV p-p max.
  • Page 39: Power Consumption Efficiency

    6.2.1 Power consumption efficiency Capacity (GB) Power Consumption Efficiency (Watts/GB) 0.015 0.016 0.022 0.033 0.065 Figure 21. Power consumption efficiency Note: Power consumption efficiency is calculated as Power Consumption of Low Power Idle Watt/ Capacity (GB). 6.3 Start up Current Figure 22.
  • Page 40: Figure 23. Typical Current Wave Form At Start Up Of 40 Gb Model

    Figure 23. Typical current wave form at start up of 40 GB model Figure 24. Typical current wave form at start up of 20 GB model) Travelstar 60GH & 40GN hard disk drive specifications...
  • Page 41: Reliability

    6.4 Reliability 6.4.1 Data reliability ! Probability of not recovering data is 1 in 10 bits read ! ECC implementation On-the-fly correction performed as a part of read channel function recovers up to 15 symbols of error in 1 sector (1 symbol is 8 bits). 6.4.2 Failure prediction (S.M.A.R.T.) The drive supports Self-monitoring, analysis and reporting technology (S.M.A.R.T.) function.
  • Page 42: Preventive Maintenance

    6.4.5 Preventive maintenance None. 6.4.6 Load/unload The product supports a minimum of 300,000 normal load/unloads. Load/unload is a functional mechanism of the hard disk drive. It is controlled by the drive micro code. Specifically, unloading of the heads is invoked by the following commands: ! Hard reset ! Standby ! Standby immediate...
  • Page 43 Simple power cycling of the drive invokes the emergency unload mechanism and subjects the HDD to nontypical mechanical stress. Power cycling testing may be required to test the boot-up function of the system. In this case IBM recom- mends that the power-off portion of the cycle contain the sequence specified in section 6.4.6.2, "Required Power-Off Sequence”...
  • Page 44: Mechanical Specifications

    6.5 Mechanical specifications 6.5.1 Physical dimensions and weight The following figure lists the dimensions for the drive. Models Height (mm) Width (mm) Length (mm) Weight (gram) 60 GB 12.5±0.2 69.85±0.25 100.2±0.25 155 Max 40 GB, 30 GB 9.5±0.2 69.85±0.25 100.2±0.25 99 Max 20 GB, 10 GB 9.5±0.2...
  • Page 45: Connector And Jumper Description

    Figure 27. Mounting hole locations of all models except 60 GB model. 6.5.3 Connector and jumper description A jumper is used to designate the drive address as either master or slave. The jumper setting method is described in section 7.10, "Drive address setting" on page 58. Connector specifications are included in section 7.2, "Interface connector"...
  • Page 46: Load/Unload Mechanism

    The user is responsible for using the appropriate screws or equivalent mounting hardware to mount the drive securely enough to prevent excessive motion or vibration of the drive at seek operation or spindle rotation. 6.5.5 Load/unload mechanism The head load/unload mechanism is provided to protect the disk data during shipping, movement, or storage.
  • Page 47: Vibration And Shock

    6.6 Vibration and shock All vibration and shock measurements in this section are for drives without mounting attachments for sys- tems. The input level shall be applied to the normal drive mounting points. Vibration tests and shock tests are to be conducted by mounting the drive to a table using the bottom four mounting holes.
  • Page 48: Nonoperating Vibration

    6.6.2 Nonoperating vibration The disk drive withstands the following vibration levels without any loss or permanent damage. 6.6.2.1 Random vibration The test consists of a random vibration applied in each of three mutually perpendicular axes for a duration of 15 minutes per axis. The PSD levels for the test simulating the shipping and relocation environment is shown below.
  • Page 49: Figure 32. Nonoperating Shock

    6.6.4 Nonoperating shock The drive withstands the following half-sine shock pulse without any data loss or permanent damage. Models Duration of 1 ms Duration of 11 ms 60 GB 700 G 120 G All others 800 G 120 G Figure 32. Nonoperating shock The shocks are applied for each direction of the drive for three mutually perpendicular axes, one axis at a time.
  • Page 50: Nonoperating Shock 6.7 Acoustics

    6.7 Acoustics 6.7.1 Sound power level The criteria of A-weighted sound power level are described below. Measurements are to be taken in accordance with ISO 7779. The mean of the sample of 40 drives is to be less than the typical value. Each drive is to be less than the maximum value. The drives are to meet this requirement in both board down orientations.
  • Page 51: Discrete Tone Penalty

    6.7.2 Discrete tone penalty Discrete tone penalties are added to the A-weighted sound power (Lw) with the following formula only when determining compliance. Lwt(spec) = Lw = 0.1Pt + 0.3 < 4.0 (Bels) where Lw = A-weighted sound power level Pt = Value of desecrate tone penalty = dLt –...
  • Page 52: Identification Labels

    A label which is placed on the top of the head disk assembly containing the statement "Made by IBM" or equivalent, part number, EC number, and FRU number. A bar code label which is placed on the disk drive based on user request. The location on the disk drive is to be designated in the drawing provided by the user.
  • Page 53: Safety

    6.10 Safety 6.10.1 UL and CSA approval The product is qualified per UL (Underwriters Labratory) 1950 Third Edition and CAN/CSA C22.2 No.950-M95 Third Edition, for the use in Information Technology Equipment, including Electric Business Equipment. The UL Recognition or the CSA certification is maintained for the product life. The UL and C-UL recognition mark or the CSA monogram for CSA certification appears on the drive.
  • Page 54: Electrical Interface Specifications

    7.0 Electrical interface specifications 7.1 Cabling The maximum cable length from the host system to the hard disk drive plus circuit pattern length in the host system shall not exceed 18 inches. 7.2 Interface connector The signal connector for AT attachment is designed to mate with the 50 pin plug specified in Annex A, Connectors and Cable Assembly, of the ATA/ATAPI-5 document.
  • Page 55: Signal Definitions

    7.3 Signal definitions The pin assignments of interface signals are listed as follows: SIGNAL Type SIGNAL Type RESET- DD07 3–state DD08 3–state DD06 3–state DD09 3–state DD05 3–state DD10 3–state DD04 3–state DD11 3–state DD03 3–state DD12 3–state DD02 3–state DD13 3–state DD01...
  • Page 56: Figure 36. Special Signal Definitions For Ultra Dma

    Special Definition Conventional Definition (for Ultra DMA) DDMARDY- IORDY Write Operation HSTROBE DIOR- STOP DIOW- HDMARDY- DIOR- Read Operation DSTROBE IORDY STOP DIOW- Figure 36. Special signal definitions for Ultra DMA Travelstar 60GH & 40GN hard disk drive specifications...
  • Page 57: Signal Descriptions

    7.4 Signal descriptions DD00–DD15 A 16-bit bi-directional data bus between the host and the drive. The lower 8 lines, DD00-07, are used for Register and ECC access. All 16 lines, DD00–15, are used for data transfer. These are 3-state lines with 24 mA current sink capability. DA00–DA02 These are addresses used to select the individual register in the drive.
  • Page 58 PDIAG- This signal shall be asserted by device 1 to indicate to device 0 that it has completed the diagnostics. This line is pulled up to 5 volts in the drive through a 10 kΩ resistor. Following a Power On Reset, software reset, or RESET-, drive 1 shall negate PDIAG- within 1 ms (to indicate to device 0 that it is busy).
  • Page 59 HDMARDY- (Ultra DMA) This signal is used only for Ultra DMA data transfers between host and drive. The signal HDMARDY- is a flow control signal for Ultra DMA data in bursts. This signal is held asserted by the host to indicate to the device that the host is ready to receive Ultra DMA data in transfers.
  • Page 60: Interface Logic Signal Levels

    7.5 Interface logic signal levels The interface logic signals have the following electrical specifications: Inputs Input High Voltage 2.0 V min./5.5 V max. Input Low Voltage –0.5 V min./0.8 V max. Outputs: Output High Voltage 2.4 V min. Output Low Voltage 0.5 V max.
  • Page 61: Pio Timings

    7.7 PIO timings The PIO cycle timings meet Mode 4 of the ATA-5 description. CS(1:0)- DA(2:0) DIOR-, DIOW- Write data DD(15:0) Read data DD(15:0) t7(*) t8(*) IOCS16-(*) IORDY (*) Up to ATA-2 (mode-0,1,2) PARAMETER DESCRIPTION MIN (ns) MAX. (ns) Cycle time –...
  • Page 62: Multiword Dma Timings

    Multiword DMA timings The Multiword DMA timings meet Mode 2 of the ATA-3 description. DMARQ tLR/tLW DMACK- tKR/tKW DIOR-/DIOW- READ DD(15:0) WRITE DD(15:0) PARAMETER DESCRIPTION MIN (ns) MAX (ns) Cycle time – DIOR-/DIOW- asserted pulse width – DIOR- data access –...
  • Page 63: Ultra Dma Timings

    7.9 Ultra DMA timings The Ultra DMA timings meet Mode 0, 1, 2, 3, 4, and 5 of the Ultra DMA Protocol. 7.9.1 Initiating Read DMA DMARQ DMACK- tACK tENV STOP tACK tENV t2CYC HDMARDY- tZIORDY tCYC tCYC DSTROBE tAZD DD(15:0) xxxxxxxxxxxxxxxxxxxxxxxxx RD Data...
  • Page 64: Host Pausing Read Dma

    7.9.2 Host Pausing Read DMA DMARQ DMACK- STOP HDMARDY- tRFS DSTROBE MODE 0 MODE 1 MODE 2 MODE 3 MODE 4 MODE 5 PARAMETER DESCRIPTION (ns) (ns) (ns) (ns) (ns) (ns) (ns) (ns) (ns) (ns) (ns) (ns) DSTROBE to HDMARDY- –...
  • Page 65: Host Terminating Read Dma

    7.9.3 Host Terminating Read DMA DMARQ tMLI DMACK- tACK STOP tACK HDMARDY- tRFS tIORDYZ DSTROBE xxxxxxxxxxxxxxxxxx RD Data xxxxxxxxxxx DD(15:0) tZAH Device drives DD Host drives DD MODE 0 MODE 1 MODE 2 MODE 3 MODE 4 MODE 5 PARAMETER DESCRIPTION (ns) (ns) (ns)
  • Page 66: Device Terminating Read Dma

    7.9.4 Device Terminating Read DMA DMARQ tMLI DMACK- tACK STOP tACK HDMARDY- tIORDYZ DSTROBE xxxxxx xxxxxxxxxxxxxxxxxx xxxxxxxxxx DD(15:0) tZAH Host drives DD Device drives DD MODE 0 MODE 1 MODE 2 MODE 3 MODE 4 MODE 5 PARAMETER DESCRIPTION (ns) (ns) (ns) (ns)
  • Page 67: Initiating Write Dma

    7.9.5 Initiating Write DMA DMARQ DMACK- tENV tACK STOP tZIORDY t2CYC DDMARDY- tCYC tCYC tACK HSTROBE DD(15:0) xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx WT Data WT Data WT Data Host drives DD MODE 0 MODE 1 MODE 2 MODE 3 MODE 4 MODE 5 PARAMETER DESCRIPTION (ns) (ns) (ns)
  • Page 68: Device Pausing Write Dma

    7.9.6 Device Pausing Write DMA DMARQ DMACK- STOP DDMARDY- tRFS HSTROBE MODE 0 MODE 1 MODE 2 MODE 3 MODE 4 MODE 5 PARAMETER DESCRIPTION (ns) (ns) (ns) (ns) (ns) (ns) (ns) (ns) (ns) (ns) (ns) (ns) HSTROBE to DDMARDY- time –...
  • Page 69: Device Terminating Write Dma

    7.9.7 Device Terminating Write DMA DMARQ tMLI DMACK- tACK STOP tIORDYZ DDMARDY- tACK tRFS HSTROBE xxx WT Data xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxx DD(15:0) Host drives DD MODE 0 MODE 1 MODE 2 MODE 3 MODE 4 MODE 5 PARAMETER DESCRIPTION (ns) (ns) (ns) (ns) (ns)
  • Page 70: Host Terminating Write Dma

    7.9.8 Host Terminating Write DMA DMARQ tMLI DMACK- tACK STOP tIORDYZ DDMARDY- tACK HSTROBE xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxx DD(15:0) Host drives DD MODE 0 MODE 1 MODE 2 MODE 3 MODE 4 MODE 5 PARAMETER DESCRIPTION (ns) (ns) (ns) (ns) (ns) (ns) (ns) (ns) (ns)
  • Page 71: Drive Address Setting

    7.10 Drive address setting A jumper placed on the interface connector determines the drive address. The three drive addresses are shown below. Figure 48. Drive address setting Setting 1—Device 0 (Master) (no jumper is used) Setting 2—Device 1 (Slave) Setting 3—Cable Select Setting 4—Never attach a jumper here Setting 5—Never attach a jumper here When pin C is grounded, the drive does not spin up at POR.
  • Page 72: Addressing Of Hdd Registers

    7.11 Addressing of HDD registers The host addresses the drive through a set of registers called a Task File. These registers are mapped into the host's I/O space. Two chip select lines (CS0- and CS1-) and three address lines (DA00–02) are used to select one of these registers, while a DIOR- or DIOW- is provided at the specified time.
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  • Page 74: Part 2. Interface Specification

    Part 2. Interface specification Travelstar 60GH & 40GN hard disk drive specifications...
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  • Page 76: General

    8.0 General 8.1 Introduction This specification describes the host interface of the Travelstar 60GH & 40GN. The interface conforms to the Working Document of Information technology, AT Attachment with Packet Interface Extension (ATA/ATAPI-5) Revision 3, dated 29 February 2000, with certain limitations described in section 9.0, "Deviations From Standard”...
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  • Page 78: Deviations From Standard

    9.0 Deviations from standard The device conforms to the referenced specifications, with deviations described below. The interface conforms to the Working Document of Information Technology, AT Attachment with Packet Interface Extension (ATA/ATAPI-5) Revision 3, dated 29 February 2000, with the following deviation: Standby Timer Standby timer is enabled by STANDBY command or IDLE command.
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  • Page 80: Registers

    10.0 Registers Addresses Functions CS0- CS1- READ (DIOR-) WRITE (DIOW-) Data bus high Not used impedance Control block registers Data bus high Not used impedance Data bus high Not used impedance Alternate Status Device Control Device Address Not used Command block registers Data Data Error Register...
  • Page 81: Alternate Status Register

    10.1 Alternate Status Register Alternate Status Register Figure 51. Alternate Status Register This register contains the same information as the Status Register. The only difference between this register and the Status Register is that reading the Alternate Status Register does not imply an interrupt acknowledge or a clear of a pending interrupt.
  • Page 82: Data Register

    10.5 Data Register This register is used to transfer data blocks between the device data buffer and the host. It is also the re- gister through which sector information is transferred on a Format Track command and the configuration information is transferred on an Identify Device command. All data transfers are 16 bits wide, except for ECC byte transfers, which are 8 bits wide.
  • Page 83: Drive Address Register

    10.7 Drive Address Register Drive Address Register -WTG -DS1 -DS0 Figure 53. Drive Address Register This register contains the inverted drive select and head select addresses of the currently selected drive. Bit Definitions High Impedance. This bit is not a device and will always be in a high impedance state.
  • Page 84: Error Register

    10.9 Error Register Error Register IDNF ABRT TK0NF AMNF Figure 55. Error Register This register contains the status from the last command executed by the device or a diagnostic code. At the completion of any command, except Execute Device Diagnostic, the contents of this register are always valid even if ERR = 0 is in the Status Register.
  • Page 85: Sector Number Register

    10.12 Sector Number Register This register contains the starting sector number for any disk data access for the subsequent command. The sector number is from one to the maximum number of sectors per track. In LBA mode, this register contains Bits 0–7. At the end of the command, this register is updated to reflect the current LBA Bits 0–7.
  • Page 86: General Operation Descriptions

    11.0 General operation descriptions 11.1 Reset response ATA has the following three types of resets: Power On Reset (POR) The device executes a series of electrical circuitry diagnostics, spins up the head disk assembly, tests speed and other mechanical parametric, and sets default values.
  • Page 87: Figure 57. Reset Response Table

    hard soft reset reset Aborting Host interface Aborting Device operation (*1) (*1) Initialization of hardware Internal diagnostic Starting or Spinning Up spindle motor (*6) Initialization of registers (*2) DASP- handshake PDIAG- handshake Reverting programmed parameters to (*3) default Number of CHS (set by Initialize Device Parameters) Multiple mode Write Cache...
  • Page 88: Register Initialization

    11.2 Register initialization After a power on, a hard reset, or a software reset, the register values are initialized as shown in the table below. Register Default Value Error Diagnostic Code Sector Count Sector Number Cylinder Low Cylinder High Device/Head Status Alternate Status Figure 58.
  • Page 89: Diagnostic And Reset Considerations

    11.3 Diagnostic and Reset considerations The Set Max password, the Set Max security mode and the Set Max unlock counter are not retained over a Power On Reset but are retained over a Hard Reset or Soft Reset. For each Reset and Execute Device Diagnostic, the diagnostic is done as follows: Power On Reset, DASP- is read by Device 0 to determine if Device 1 is present.
  • Page 90: Power-Off Considerations

    11.4 Power-off considerations 11.4.1 Load/Unload Load/Unload is a functional mechanism of the hard disk drive. It is controlled by the drive microcode. Specifically, unloading of the heads is invoked by the following commands. Command Response Standby UL -> Comp. Standby Immediate UL ->...
  • Page 91: Required Power-Off Sequence

    11.4.3 Required power-off sequence When power is removed on most drives at an arbitrary time, problems can result. The followoing are examples of such problems: Data is lost from the write buffer If the drive is writing a sector, a partially-written sector with an incorrect ECC block results, the sector contents are destroyed, and reading that sector results in a hard error Heads may land in the data zone instead of the landing zone depending on the design of the drive You may then turn off the drive in the following order:...
  • Page 92: Lba Addressing Mode

    11.5.2 LBA addressing mode Logical sectors on the device shall be linearly mapped with the first LBA addressed sector (sector 0) being the same sector as the first logical CHS addressed sector ( cylinder 0, head 0, sector 1). Irrespective of the logical CHS translation mode currently in effect, the LBA address of a given logical sector does not change.
  • Page 93: Power Management Features

    11.6 Power management features The power management feature set permits a host to modify the behavior in a manner which reduces the power required to operate. The power management feature set provides a set of commands and a timer that enables a device to implement low power consumption modes. The drive implements the following set of functions: 1.
  • Page 94: Standby Timer

    11.6.4 Standby timer The standby timer provides a method for the device to automatically enter standby mode from either active or idle mode following a host programmed period of inactivity. If the device is in the active or idle mode, the device waits for the specified time period and if no command is received, the device automa- tically enters the standby mode.
  • Page 95: Advanced Power Management (Able-3) Feature

    11.7 Advanced Power Management (ABLE-3) feature This feature provides power saving without performance degradation. The Adaptive Battery Life Extender 3 (ABLE-3) technology intelligently manages transition among power modes within the device by monitoring access patterns of the host. This technology has three idle modes; Performance Idle mode, Active Idle mode, and Low Power Idle mode.
  • Page 96 distribution as the previous access pattern. The algorithm calculates the expected average saving energy and response delay for next command in several transition time case based on this assumption. And it selects the most effective transition time with the condition that the calculated response delay is shorter than the value calculated from the specified level by Set Feature Enable Advanced Power Management command.
  • Page 97: Function

    11.8 S.M.A.R.T. Function The intent of Self-monitoring, analysis, and reporting technology (S.M.A.R.T.) is to protect user data and prevent unscheduled system downtime that may be caused by predictable degradation and/or fault of the device. By monitoring and storing critical performance and calibration parameters, S.M.A.R.T. devices employ sophisticated data analysis algorithms to predict the likelihood of near-term degradation or fault condition.
  • Page 98: Operation With Power Management Modes

    11.8.6 S.M.A.R.T. operation with power management modes The device saves attribute values automatically on every head unload timing except the emergency un- load, even if the attribute auto save feature is not enabled. The head unload is done not only by Standby, Standby Immediate, or Sleep command or Hard Reset, but also by the automatic power saving functions like ABLE-3 or Standby timer.
  • Page 99: Security Mode Feature Set

    Otherwise, the 'default' master password which is set by IBM can unlock a device that is locked with a user password. Travelstar 60GH & 40GN hard disk drive specifications...
  • Page 100: Master Password Revision Code

    11.9.4 Master Password Revision Code This Master Password Revision Code is set by Security Set Password command with the master pass- word. And this revision code field is returned in the Identify Device command word 92. The valid revision codes are 0001h to FFFEh. The default value of Master Password Revision Code is FFFEh. Values 0000h and FFFFh are reserved.
  • Page 101: Figure 64. Usual Operation For Por

    11.9.5.3 Operation from POR after user password is set When Device Lock Function is enabled, the device rejects media access command until a Security Unlock command is successfully completed. Device Locked mode Unlock CMD Erase Prepare Media Access Non-media Access Command (*1) Command (*1) Erase Unit...
  • Page 102: Figure 65. Password Lost

    11.9.5.4 User Password lost If the User Password is forgotten and High level security is set, the system user cannot access any data. However the device can be unlocked using the Master Password. If a system user forgets the User Password and Maximum security level is set, data access is impossible. However the device can be unlocked using the Security Erase Unit command to unlock the device and erase all user data with the Master Password.
  • Page 103: Command Table

    11.9.6 Command table This table shows the device's response to commands when the Security Mode Feature Set (Device lock function) is enabled. Device Device Device Command Locked Mode Unlocked Mode Frozen Mode Check Power Mode Enable/Disable Delayed Write Device Configuration RESTORE Device Configuration FREEZE LOCK Device Configuration IDENTIFY Device Configuration SET...
  • Page 104: Figure 67. Command Table For Device Lock Operation (2 Of 2)

    Device Device Device Command Locked Mode Unlocked Mode Frozen Mode Set Max SET PASSWORD Set Max UNLOCK Set Multiple Mode Sleep S.M.A.R.T. Disable Operations S.M.A.R.T. Enable/Disable automatic off-line S.M.A.R.T. Enable/Disable Attribute Autosave S.M.A.R.T. Enable Operations S.M.A.R.T. Execute Off-line Immediate S.M.A.R.T. Read Attribute Values S.M.A.R.T.
  • Page 105: Protected Area Function

    11.10 Protected Area Function Protected Area Function is to provide a "protected area" which cannot be accessed via conventional methods. This protected area is used to contain critical system data such as BIOS or system management information. The contents of the entire system main memory may also be dumped into the protected area to resume after a system power off.
  • Page 106: Set Max Security Extension Commands

    Write information data such as BIOS code within the protected area. Change maximum LBA using Set Max ADDRESS command to 0FBFFFh with nonvolatile option. From this point, the protected area cannot be accessed until next Set Max ADDRESS command is issued.
  • Page 107: Figure 69. Set Max Security Mode Transition

    Max UNLOCK is issued and the device is locked. When this counter reaches zero, then the Set Max UNLOCK command returns command aborted until a power cycle. The Set Max FREEZE LOCK command allows the host to disable the SET MAX commands (including Set Max UNLOCK) until the next power cycle.
  • Page 108: Address Offset Feature (Vendor Specific)

    11.11 Address Offset Feature (vendor specific) Computer systems perform initial code loading (booting) by reading from a predefined address on a disk drive. To allow an alternate bootable operating system to exist in a reserved area on a disk drive this feature provides a Set Features function to temporarily offset the drive address space.
  • Page 109: Identify Device Data

    11.11.2 Identify Device Data Identify Device data, word 83, bit 7 indicates the device supports the Address Offset Feature. Identify Device data, word 86, bit 7 indicates the device is in Address Offset mode. 11.11.3 Exceptions in Address Offset Mode Any commands which access sectors across the original native maximum LBA are rejected with error, even if the access protection is removed by a Set Max Address command.
  • Page 110: Seek Overlap

    11.12 Seek Overlap The drive provides accurate seek time measurement method. The seek command is usually used to measure the device seek time by accumulating execution time for a number of seek commands. With typical implementation of the seek command, this measurement must include the device and host command overhead.
  • Page 111: Write Cache Function

    11.13 Write Cache function Write cache is a performance enhancement whereby the device reports completion of the write command (Write Sectors and Write Multiple) to the host as soon as the device has received all of the data in its buffer.
  • Page 112: Reassign Function

    11.15 Reassign Function The Reassign Function is used with read commands and write commands. The sectors of data for reassignment are prepared as the spare data sector. The one entry can register 256 consecutive sectors maximum. This reassignment information is registered internally, and the information is available right after completing the reassign function.
  • Page 113 This page intentionally left blank.
  • Page 114: Command Protocol

    12.0 Command protocol The commands are grouped into different classes according to the protocols followed for command execution. The command classes with their associated protocols are defined below. For all commands, the host must first check to see if BSY = 1, and should proceed no further unless and until BSY = 0.
  • Page 115 The device sets DRQ = 0 after the sector (or block) has been transferred to the host. 4. For the Read Long command: a. The device sets BSY = 1 and prepares for data transfer. b. When the sector of data is available for transfer to the host, the device sets BSY = 0 and DRQ = 1 and interrupts the host.
  • Page 116: Data Out Commands

    12.2 Data Out commands The following are Data Out commands: ! Device Configuration SET ! Format Track ! Security Disable Password ! Security Erase Unit ! Security Set Password ! Security Unlock ! Set Max SET PASSWORD ! Set Max UNLOCK ! S.M.A.R.T.
  • Page 117 If an uncorrectable error occurs, the device will set BSY = 0 and ERR = 1, store the error status in the Error Register, and interrupt the host. The registers will contain the location of the sector in error. The error location will be reported with CHS mode or LBA mode.
  • Page 118: Nondata Commands

    12.3 Nondata commands The following are Nondata commands: ! Check Power Mode ! Device Configuration FREEZE LOCK ! Device Configuration RESTORE ! Enable/Disable Delayed Write ! Execute Device Diagnostic ! Flush Cache ! Format Unit ! Idle ! Idle Immediate ! Initialize Device Parameters ! Read Native Max ADDRESS ! Read Verify Sectors...
  • Page 119: Dma Data Transfer Commands

    12.4 DMA Data Transfer commands These commands are: ! Read DMA ! Write DMA Data transfers using DMA commands differ in two ways from PIO transfers: ! Data transfers are performed using the Slave DMA channel ! No intermediate sector interrupts are issued on multisector commands Initiation of the DMA transfer commands is identical to the Read Sector or Write Sector commands with one exception: the host initializes the Slave DMA channel prior to issuing the command.
  • Page 120: Command Descriptions

    13.0 Command descriptions The table below shows the commands that are supported by the device. Figure 74 on page 113 shows the subcommands that are supported by each command or feature. Code Binary Code Bit Protocol Command (Hex) 7 6 5 4 3 2 1 0 Check Power Mode 1 1 1 0 0 1 0 1 Check Power Mode*...
  • Page 121: Figure 73. Command Set (2 Of 2)

    Code Binary Code Bit Protocol Command (Hex) 7 6 5 4 3 2 1 0 Set Max UNLOCK 1 1 1 1 1 0 0 1 Set Multiple Mode 1 1 0 0 0 1 1 0 Sleep 1 1 1 0 0 1 1 0 Sleep* 1 0 0 1 1 0 0 1 S.M.A.R.T.
  • Page 122: Figure 74. Command Set (Subcommand)

    Command Feature Command (Subcommand) Code Register (Hex) (Hex) (Delayed Write Function) Enable Delayed Write function Disable Delayed Write function (S.M.A.R.T Function) S.M.A.R.T. Read Attribute Values S.M.A.R.T. Read Attribute Thresholds S.M.A.R.T. Enable/Disable Attribute Autosave S.M.A.R.T. Save Attribute Values S.M.A.R.T. Execute Off-line Immediate S.M.A.R.T.
  • Page 123 The following symbols are used in the command descriptions: Output Registers This indicates that the bit must be set to 0. This indicates that the bit must be set to 1. The device number bit. Indicates that the device number bit of the Device/Head Register should be specified.
  • Page 124: Check Power Mode (E5H/98H)

    13.1 Check Power Mode (E5h/98h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
  • Page 125: Device Configuration Overlay (B1H)

    13.2 Device Configuration Overlay (B1h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
  • Page 126: Device Configuration Freeze Lock (Subcommand C1H)

    13.2.2 DEVICE CONFIGURATION FREEZE LOCK (subcommand C1h) The DEVICE CONFIGURATION FREEZE LOCK command prevents accidental modification of the Device Configuration Overlay settings. After successful execution of a DEVICE CONFIGURATION FREEZE LOCK command, all DEVICE CONFIGURATION SET, DEVICE CONFIGURATION FREEZE LOCK, DEVICE CONFIGURATION IDENTIFY, and DEVICE CONFIGURATION RESTORE commands are aborted by the device.
  • Page 127: Figure 78. Device Configuration Overlay Data Structure

    ERROR INFORMATION EXAMPLE 2: When the device is enabled and the Security feature is set, if the user attempts to disable that feature, the device aborts that command and returns an error reason code as below. Cylinder high = word 7 is invalid Cylinder low = bit 3 is invalid Sector count...
  • Page 128: Figure 79. Dco Error Information Definition

    Cylinder high invalid word location Cylinder low invalid bit location Sector count error reason code & description DCO feature is frozen Device is now Security Locked mode Device's feature is already modified with User attempt to disable any feature enabled Device is now SET MAX Locked or Frozen mode Protected area is now established DCO is not supported...
  • Page 129: Enable/Disable Delayed Write (Fah: Vendor Specific)

    13.3 Enable/Disable Delayed Write (FAh: vendor specific) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
  • Page 130: Execute Device Diagnostic (90H)

    13.4 Execute Device Diagnostic (90h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Data - - - - - - - - - - - - - - - - Feature - - - - - - - -...
  • Page 131: Flush Cache (E7H)

    13.5 Flush Cache (E7h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature - - - - - - - -...
  • Page 132: Format Track (50H: Vendor Specific)

    13.6 Format Track (50h: vendor specific) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
  • Page 133: Format Unit (F7H: Vendor Specific)

    13.7 Format Unit (F7h: vendor specific) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
  • Page 134 The execution time of this command is shown below. Model number Execution time IC25T060ATCS05 60 min IC25N040ATCS04 44 min IC25N030ATCS04 34 min IC25N020ATCS04 22 min IC25N010ATCS04 12 min Travelstar 60GH & 40GN hard disk drive specifications...
  • Page 135: Identify Device (Ech)

    13.8 Identify Device (ECh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature - - - - - - - -...
  • Page 136: Figure 86. Identify Device Information. (Part 1 Of 7)

    Word Content Description 045AH drive bit assignments classification 15(=0) 1=ATAPI device, 0=ATA device 14(=0) 1=format speed tolerance gap required 13(=0) 1=track offset option available 12(=0) 1=data strobe offset option available 11(=0) 1=rotational speed tolerance > 0.5% 10(=1) 1=disk transfer rate > 10 Mbps 9(=0) 1=disk transfer rate >...
  • Page 137: Figure 87. Identify Device Information. (Part 2 Of 7)

    Word Content Description 0000H Capable of double word I/O, ‘0000’= cannot perform 0F00H Capabilities, bit assignments: 15-14(=0) Reserved 13(=0) Standby timer value are vendor specific 12(=0) Reserved 11(=1) IORDY Supported 10(=1) IORDY can be disabled 9(=1) Reserved 8(=0) Reserved 7–0(=0) Reserved 4000H Capabilities...
  • Page 138: Figure 88. Identify Device Information. (Part 3 Of 7)

    Word Content Description 0003H Flow Control PIO Transfer Modes Supported 15- 8(=0) Reserved 7- 0(=3) Advanced PIO Transfer Modes Supported ‘11’ = PIO Mode 3 and 4 Supported 0078H Minimum Multiword DMA Transfer Cycle Time Per Word 15- 0(=78h) Cycle time in nanoseconds (120 ns, 16.6 MB/s) 0078H Manufacturer’s Recommended Multiword DMA Transfer Cycle Time...
  • Page 139: Figure 89. Identify Device Information. (Part 4 Of 7)

    Word Content Description 49A8H Command set supported 15(=0) Always 14(=1) Always 13-12(=0) Reserved 11(=1) 1=Device Configuration Overlay command supported 10- 9(=0) Reserved ** 8(=1) 1=SET MAX security extension supported ** 7(=1) 1=Address Offset feature supported 6(=0) 1=SET FEATURES subcommand required to spin-up 5(=1) 1=Power-Up In Standby feature set supported 4(=0)
  • Page 140: Figure 90. Identify Device Information. (Part 5 Of 7)

    Word Content Description 0XXXH Command set/feature enabled 15-12(=0) Reserved 11(=1) 1=Device Configuration Overlay supported 10- 9(=0) Reserved 8(=X) 1=SET MAX security extension enabled 7(=X) 1=Address Offset mode enabled 6(=0) 1=SET FEATURES subcommand required to spin-up 5(=0) 1=Power-Up In Standby feature set has been enabled via the SET FEATURES command 4(=0) 1=Removable Media Status Notification Feature...
  • Page 141: Figure 91. Identify Device Information. (Part 6 Of 7)

    Word Content Description XXXXH Hardware reset results 15-13 Device detected result 15(=0) Reserved 14(=1) Always 13(=X) 1=Device detected CBLID- above V 0=Device detected CBLID- below V 12- 8 Device 1 hardware reset result Device 0 clear these bits to 0 12(=0) Reserved 11(=X)
  • Page 142: Figure 92. Identify Device Information. (Part 7 Of 7)

    Word Content Description 000XH Current Set Feature Option. Bit assignments 15-4(=0) Reserved 3(=X) 1=Auto reassign enabled 2(=X) 1=Reverting enabled 1(=X) 1=Read Look-ahead enabled 0(=X) 1=Write Cache enabled XXXXH Reserved 000XH Initial Power Mode Selection. Bit assignments 15-2(=0) Reserved 1(=1) Always 0(=X) Initial Power Mode: 1=Standby, 0=Idle 132-254...
  • Page 143: Figure 93. Number Of Cylinders/Heads/Sectors By Model

    Microcode revision CAxOAxxx IC25T060ATCS05-0 Number of cylinders 3FFFh Number of heads Buffer size 0DD0h (=1,768KB) Total number of user 6FC7C80h addressable sectors IC25N040ATCS04-0 Number of cylinders 3FFFh Number of heads Buffer size 0DD0h (=1,768KB) Total number of user 4A85300h addressable sectors IC25N030ATCS04-0 Number of cylinders 3FFFh...
  • Page 144: Idle (E3H/97H)

    13.9 Idle (E3h/97h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature - - - - - - - - Error...
  • Page 145: Idle Immediate (E1H/95H)

    13.10 Idle Immediate (E1h/95h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature - - - - - - - -...
  • Page 146: Initialize Device Parameters (91H)

    13.11 Initialize Device Parameters (91h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
  • Page 147: Read Buffer (E4H)

    13.12 Read Buffer (E4h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature - - - - - - - -...
  • Page 148: Read Dma (C8H/C9H)

    13.13 Read DMA (C8h/C9h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature - - - - - - - -...
  • Page 149 Input parameters from the device Sector Count This indicates the number of requested sectors not transferred. This will be zero, unless an unrecoverable error occurs. Sector Number This indicates the sector number of the last transferred sector. (L = 0) In LBA mode this register contains the current LBA bits 0–7.
  • Page 150: Read Long (22H/23H)

    13.14 Read Long (22h/23h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature - - - - - - - -...
  • Page 151 This indicates the retry bit, but this bit is ignored. Input parameters from the device Sector Count This indicates the number of requested sectors not transferred. Sector Number This indicates the sector number of the transferred sector. (L = 0) In LBA mode, this register contains current LBA bits 0–7.
  • Page 152: Read Multiple (C4H)

    13.15 Read Multiple (C4h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature - - - - - - - -...
  • Page 153 Input parameters from the device Sector Count This indicates the number of requested sectors not transferred. This number is zero unless an unrecoverable error occurs. Sector Number This indicates the sector number of the last transferred sector. (L = 0) In LBA mode, this register contains the current LBA bits 0–7.
  • Page 154: Read Native Max Address (F8H)

    13.16 Read Native Max ADDRESS (F8h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
  • Page 155 Valid. Indicates that the bit is part of an input parameter and will be set to 0 or 1 by the device. This indicates that the bit is not used. Travelstar 60GH & 40GN hard disk drive specifications...
  • Page 156: Read Sectors (20H/21H)

    13.17 Read Sectors (20h/21h) Command Block Output Command Block Input Registers Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature - - - - - - - -...
  • Page 157 Input parameters from the device Sector Count This is the number of requested sectors not transferred. This will be zero, unless an unrecoverable error occurs. Sector Number This is the sector number of the last transferred sector. (L = 0) In LBA mode this register contains the current LBA bits 0–7.
  • Page 158: Read Verify Sectors (40H/41H)

    13.18 Read Verify Sectors (40h/41h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
  • Page 159 Input parameters from the device Sector Count This is the number of requested sectors not verified. This number will be zero unless an unrecoverable error occurs. Sector Number This is the sector number of the last transferred sector. (L = 0) In LBA mode this register contains the current LBA bits 0–7.
  • Page 160: Recalibrate (1Xh)

    13.19 Recalibrate (1xh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature - - - - - - - - Error...
  • Page 161: Security Disable Password (F6H)

    13.20 Security Disable Password (F6h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
  • Page 162: Security Erase Prepare (F3H)

    13.21 Security Erase Prepare (F3h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
  • Page 163: Security Erase Unit (F4H)

    13.22 Security Erase Unit (F4h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
  • Page 164 Identifier Zero indicates that the device should check the supplied password against the user password stored internally. One indicates that the device should check the given password against the master password stored internally. The Security Erase Unit command erases all user data and disables the security mode feature (device lock function).
  • Page 165: Security Freeze Lock (F5H)

    13.23 Security Freeze Lock (F5h) Command Block Output Command Block Input Registers Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
  • Page 166: Security Set Password (F1H)

    13.24 Security Set Password (F1h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
  • Page 167: Figure 112. Security Set Password Information

    Word Description Control Word bit 0 : Identifier (1-Master, 0-User) bit 1-7 : Reserved bit 8 : Security level (1-Maximum, 0-High) bit 9-15 : Reserved 01-16 Password ( 32 bytes ) Master Password Revision Code (valid if 17-18 Word 0 bit 0 = 1) 19-255 Reserved Figure 112.
  • Page 168: Security Unlock (F2H)

    13.25 Security Unlock (F2h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature - - - - - - - -...
  • Page 169: Figure 114. Security Unlock Information

    Word Description Control Word bit 0 : Identifier (1- Master, 0- User) bit 1-15 : Reserved 01-16 Password ( 32 bytes ) 17-255 Reserved Figure 114. Security Unlock information Identifier A zero indicates that the device regards Password as the User Password. A one indicates that the device regards Password as the Master Password.
  • Page 170: Seek (7Xh)

    13.26 Seek (7xh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature - - - - - - - - Error...
  • Page 171: Sense Condition (F0H: Vendor Specific)

    13.27 Sense Condition (F0h: vendor specific) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
  • Page 172: Set Features (Efh)

    13.28 Set Features (EFh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature V V V V V V V V...
  • Page 173 Output parameters to the device Feature Destination code for this command. Enable write cache (See note 2) Set transfer mode based on value in sector count register Enable Advanced Power Management Enable Address Offset mode 40 bytes of ECC apply on Read Long/Write Long commands Disable read look-ahead feature Disable reverting to power on defaults Disable write cache...
  • Page 174: Set Max Address (F9H)

    13.29 Set Max ADDRESS (F9h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
  • Page 175 Output parameters to the device Feature Destination code for this command SET MAX SET PASSWORD SET MAX LOCK SET MAX UNLOCK SET MAX FREEZE LOCK When the Set Max ADDRESS command is executed, this register is ignored. This indicates the option bit for selection whether nonvolatile or volatile. B = 0 is the volatile condition.
  • Page 176: Set Multiple (C6H)

    13.30 Set Multiple (C6h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature - - - - - - - -...
  • Page 177: Sleep (E6H/99H)

    13.31 Sleep (E6h/99h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature - - - - - - - - Error...
  • Page 178: Function Set (B0H)

    13.32 S.M.A.R.T. Function Set (B0h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
  • Page 179: Function Subcommands

    13.32.1 S.M.A.R.T. Function Subcommands 13.32.1.1 S.M.A.R.T. Read Attribute Values (subcommand D0h) This subcommand returns the device's Attribute Values to the host. Upon receipt of the S.M.A.R.T. Read Attribute Values subcommand from the host, the device asserts BSY, saves any updated Attribute Values to the Attribute Data sectors, asserts DRQ, clears BSY, asserts INTRQ, and then waits for the host to transfer the 512 bytes of Attribute Value information from the device via the Data Register.
  • Page 180: Figure 122. Log Sector Addresses

    13.32.1.5 S.M.A.R.T. Execute Off-line Immediate (subcommand D4h) This subcommand causes the device to immediately initiate the set of activities that collect Attribute data in an off-line mode (off-line routine) or execute a self-test routine in either captive or off-line mode. The Sector Number register shall be set to specify the operation to be executed.
  • Page 181 13.32.1.8 S.M.A.R.T. Enable Operations (subcommand D8h) This subcommand enables access to all S.M.A.R.T. capabilities within the device. Prior to receipt of a S.M.A.R.T. Enable Operations subcommand, Attribute Values are neither monitored nor saved by the device. The state of S.M.A.R.T.—either enabled or disabled—will be preserved by the device across power cycles.
  • Page 182 The Sector Count register shall be set to specify the feature to be enabled or disabled: Sector Count Feature Description Disable Automatic Off-line Disable Off-line Read Scanning Enable Automatic Off-line Enable Off-line Read Scanning A value of zero written by the host into the device's Sector Count register before issuing this subcommand shall cause the automatic off-line data collection feature to be disabled.
  • Page 183: Device Attributes Data Structure

    13.32.2 Device Attributes Data Structure The following defines the 512 bytes that make up the Attribute Value information. This data structure is accessed by the host in its entirety using the S.M.A.R.T. Read Attribute Values subcommand. All multibyte fields shown in these data structures follow the ATA/ATAPI-5 specification for byte ordering, namely, that the least significant byte occupies the lowest numbered byte address location in the field.
  • Page 184: Figure 124. Individual Attribute Data Structure

    13.32.2.2 Individual Attribute Data Structure The following defines the 12 bytes that make up the information for each Attribute entry in the Device Attribute Data Structure. Description Byte Offset Value Attribute ID Number (01h to FFh) binary Status Flags bit flags Bit 0 Pre-Failure/Advisory Bit 1...
  • Page 185: Figure 125. Status Flag Definitions

    Reallocation Event Count Current Pending Sector Count Off-Line Scan Uncorrectable Sector Count Ultra DMA CRC Error Count Status Flag definitions: Flag Name Definition Pre-Failure/ If bit = 0, an Attribute Value less than or Advisory bit equal to its corresponding Attribute Threshold indicates an Advisory condition where the usage or age of the device has exceeded its intended design life period.
  • Page 186 All segments completed without errors. In this case the current segment pointer is equal to the total segments required. Off-line data collection is suspended by the interrupting command. Off-line data collecting is aborted by the interrupting command. Off-line data collection is aborted with a fatal error. 13.32.2.4 Self-test execution status Definition Percent Self-test remaining.
  • Page 187 Abort/restart off-line by host bit 0 The device will suspend off-line data collection activity after an interrupting command and resume it after a vendor specific event 1 The device will abort off-line data collection activity upon receipt of a new command Off-line Read Scanning implemented bit 0 The device does not support Off-line Read Scanning 1 The device supports Off-line Read Scanning...
  • Page 188: Device Attribute Thresholds Data Structure

    13.32.3 Device Attribute Thresholds data structure The following defines the 512 bytes that make up the Attribute Threshold information. This data structure is accessed by the host in its entirety using the S.M.A.R.T. Read Attribute Thresholds. All multibyte fields shown in these data structures follow the ATA/ATAPI-5 specification for byte ordering, that is, that the least significant byte occupies the lowest numbered byte address location in the field.
  • Page 189: Figure 127. Individual Threshold Data Structure

    13.32.3.2 Individual Thresholds Data Structure The following defines the 12 bytes that make up the information for each Threshold entry in the Device Attribute Thresholds Data Structure. Attribute entries in the Individual Threshold Data Structure are in the same order and correspond to the entries in the Individual Attribute Data Structure. Description Byte Offset...
  • Page 190: Error Log Sector

    13.32.4 S.M.A.R.T. error log sector The following defines the 512 bytes that make up the S.M.A.R.T. error log sector. All multibyte fields shown in these data structures follow the ATA/ATAPI-5 specifications for byte ordering. Description Byte Offset S.M.A.R.T. error log version Error log pointer 1st error log data structure 2nd error log data structure...
  • Page 191: Figure 130. Command Data Structure

    Command data structure Data format of each command data structure is shown below. Description Byte Offset Device Control register Features register Sector count register Sector number register Cylinder Low register Cylinder High register Device/Head register Command register Time stamp (milliseconds from Power On) Figure 130.
  • Page 192: Figure 131. Error Data Structure

    13.32.4.5 Error data structure Data format of error data structure is shown below. Description Byte Offset Reserved Error register Sector count register Sector number register Cylinder Low register Cylinder High register Device/Head register Status register Extended error data (vendor specific) State Life time stamp (hours) Figure 131.
  • Page 193: Self-Test Log Data Structure

    13.32.5 Self-test log data structure The following defines the 512 bytes that make up the Self-test log sector. All multibyte fields shown in these data structures follow the ATA/ATAPI-5 specifications for byte ordering. Description Byte Offset Data structure revision Self-test number n*18h+02h Self-test execution status n*18h+03h...
  • Page 194: Error Reporting

    13.32.6 Error reporting The following table shows the values returned in the Status and Error Registers when specific error condi- tions are encountered by a device. Status Error Error condition Register Register A S.M.A.R.T. FUNCTION SET command was re- ceived by the device without the required key being loaded into the Cylinder High and Cylinder Low registers.
  • Page 195: Standby (E2H/96H)

    13.33 Standby (E2h/96h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature - - - - - - - - Error...
  • Page 196: Standby Immediate (E0H/94H)

    13.34 Standby Immediate (E0h/94h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature - - - - - - - -...
  • Page 197: Write Buffer (E8H)

    13.35 Write Buffer (E8h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature - - - - - - - -...
  • Page 198: Write Dma (Cah/Cbh)

    13.36 Write DMA (CAh/CBh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 - - - - - - - - - - - - - - - - Data Data - - - - - - - -...
  • Page 199 This indicates the retry bit, but this bit is ignored. Input parameters from the device Sector Count This indicates the number of requested sectors not transferred. The Sector Count will be zero unless an unrecoverable error occurs. Sector NumberThis indicates the sector number of the last transferred sector. (L = 0) In LBA mode this register contains the current LBA bits 0–7.
  • Page 200: Write Long (32H/33H)

    13.37 Write Long (32h/33h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 - - - - - - - - - - - - - - - - Data Data - - - - - - - -...
  • Page 201 This indicates the head number of the sector to be transferred. (L = 0) In LBA mode this register contains the LBA bits 24–27. (L = 1) The retry bit, but this bit is ignored. Input parameters from the device Sector Count This indicates the number of requested sectors not transferred.
  • Page 202: Write Multiple (C5H)

    13.38 Write Multiple (C5h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 - - - - - - - - - - - - - - - - Data Data - - - - - - - -...
  • Page 203 Input parameters from the device Sector Count This indicates the number of requested sectors not transferred. The Sector Count will be zero, unless an unrecoverable error occurs. Sector NumberThis indicates the sector number of the last transferred sector. (L = 0) In LBA mode this register contains current the LBA bits 0–7.
  • Page 204: Write Sectors (30H/31H)

    13.39 Write Sectors (30h/31h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 - - - - - - - - - - - - - - - - Data Data - - - - - - - -...
  • Page 205 Input parameters from the device Sector Count This indicates the number of requested sectors not transferred. The Sector Count will be zero unless an unrecoverable error occurs. Sector NumberThis indicates the sector number of the last transferred sector. (L = 0) In LBA mode this register contains the current LBA bits 0–7.
  • Page 206: Write Verify (3Ch: Vendor Specific)

    13.40 Write Verify (3Ch: vendor specific) In the implementation of the drive the Write Verify command is exactly the same as the Write Sectors command (30h). Read verification is not performed after the write operation. Refer to 13.39, "Write Sectors Command" on page 191 for parameters. Travelstar 60GH &...
  • Page 207 This page intentionally left blank.
  • Page 208: Time-Out Values

    14.0 Time-out values The timing of BSY and DRQ in Status Register are shown in the table below. INTERVAL START STOP TIME-OUT Power On Device Busy Status Register Power On 400 ns After Power On BSY=1 Device Ready Status Register Power On 31 sec After Power On...
  • Page 209 Command category is referred to in section 12.0, "Command protocol" on page 101. We recommend that the host system execute Soft reset and then retry to issue the command if the host system time-out would occur for the device. Note 1. For SECURITY ERASE UNIT command, the execution time is referred to 13.22, "Security Erase Unit (F4h)”...
  • Page 210: Appendix

    15.0 Appendix 15.1 Commands Support Coverage The table below compares the command support coverage of the Travelstar 60GH & 40GN with the ATA-5 defined command set. The third column indicates the capability of the Travelstar 60GH & 40GN for those commands. Implementation Command ATA-5 Category...
  • Page 211: Figure 143. Command Coverage (2 Of 2)

    Implementation Command Command Name for Travelstar ATA-5 Command Type Code 60GH & 40GN WRITE DMA Mandatory WRITE DMA Obsoleted WRITE DMA QUEUED Optional CFA WRITE MULTIPLE W/O ERASE Optional (Note 7) GET MEDIA STATUS Optional (Note 7) MEDIA LOCK Optional (Note 7) MEDIA UNLOCK Optional (Note 7) STANDBY IMMEDIATE...
  • Page 212: Set Features Command Support Coverage

    15.2 SET FEATURES Command Support Coverage The following table provides a list of Feature Registers, Feature Names, and implementation for the Travelstar 60GH & 40GN. The third column indicates whether or not the Travelstar 60GH & 40GN has the capability of executing the command in comparison to the ATA-4 defined command set. For detailed operation, refer to section 13.28, "Set Features (EFh)”...
  • Page 213: Changes From Travelstar 48Gh, 30Gn & 15Gn

    15.3 Changes from Travelstar 48GH, 30GN & 15GN The Travelstar 60GH & 40GN has changed one feature present in the Travelstar 48GH, 30GN & 15GN: Ÿ The identify device information data. Travelstar 60GH & 40GN hard disk drive specifications...
  • Page 214: Index

    Index Set Features (EFh), 159 Set Max ADDRESS (F9h), 161 ABLE-3, 82 Set Multiple (C6h), 163 ABRT, 71 Sleep (E6h/99h), 164 Active Idle mode, 82 Standby (E2h/96h), 182 Adaptive Power Management Feature Standby Immediate (E0h/94h), 183 Low Power Idle Mode, 82 Write Buffer (E8h), 184 Address Offset Feature, 95 Write DMA (CAh/CBh), 185...
  • Page 215 Sector Number Register, 72 Status Register, 72 Magnetic flux density limits, 24 Register Set, 67 Master Password, 86 Reset Master Password Revision Code, 87 Diagnostic and reset considerations, 76 Register initialization, 75 Reset error register values, 76 Nonrecovered read errors, 99 Reset timings, 47 Nonrecovered write errors, 20, 99 S.M.A.R.T.
  • Page 216 Sound power level, 37 Standby, 105, 182 Vibration, 34 Standby Immediate, 105, 183 Standby timer, 81 Standby/Sleep command completion timing, 80 Write Buffer, 103, 184 Write Cache, 19, 98 Write DMA, 106, 185 Table of signals, 42 Write Long, 103, 187 Time-out interval, 131 Write Multiple, 103, 189 Time-out Parameter, 131, 132...
  • Page 217 IBM representative. Data subject to change without notice. References in this publication to IBM products, programs, or services do not imply that IBM intends to make them available in all countries in which IBM operates. Document # S07N-7681-09 Publication # 1540...

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