Addressing Of Registers; Cabling; Table 39.I/O Address Map - Hitachi 7K80 - Deskstar - Hard Drive Specifications
3.5 inch ultra ata/133 hard disk drive
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6.9 Addressing of registers
The host addresses the drive through a set of registers called a Task File. These registers are mapped into the host's
I/O space. Two chip select lines (CS0– and CS1–) and three address lines (DA0–2) are used to select one of these
registers, while a DIOR– or DIOW– is provided at the specified time.
The chip select line CS0- is used to address the Command Block registers while the CS1– is used to address Con-
trol Block registers.
The following table shows the I/ O address map.
Table 39: I/O address map
CS0– CS1–
DA2 DA1 DA0
0
1
0
0
0
1
0
0
0
1
0
1
0
1
0
1
0
1
1
0
1
0
0
1
0
1
1
1
0
1
1
1
1
0
1
1
Note: "Addr" field is shown as an example.
During DMA operation (from writing to the command register until an interrupt) not all registers are accessible.
For example, the host is not supposed to read status register contents before interrupt (the value is invalid).
6.9.1 Cabling
The maximum cable length from the host system to the drive plus circuit pattern length in the host system shall not
exceed 18 inches.
For higher data transfer application (>8.3 MB/s) a modification in the system design is recommended to reduce
cable noise and cross-talk, such as a shorter cable, bus termination, or a shielded cable.
For systems operating with Ultra DMA mode 3, 4, and 5, 80-conductor ATA cable assembly shall be used.
DIOR– = 0 (Read)
Command Block Registers
0
Data Reg.
1
Error Reg.
0
Sector count Reg.
1
Sector number Reg.
0
Cylinder low Reg.
1
Cylinder high Reg.
0
Drive/Head Reg.
1
Status Reg.
Control Block Registers
0
Alt. Status Reg.
Deskstar 7K80 Hard Disk Drive Specification
DIOW– = 0 (Write)
Data Reg.
Features Reg.
Sector count Reg.
Sector number Reg.
Cylinder low Reg.
Cylinder high Reg.
Drive/Head Reg.
Command Reg.
Device control Reg.
50
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