12.2
Register Descriptions
12.2.1
Receive Shift Register (RSR)
RSR is the register that receives serial data.
Bit
Read/Write
The SCI loads serial data input at the RxD pin into RSR in the order received, LSB (bit 0) first,
thereby converting the data to parallel data. When one byte of data has been received, it is
automatically transferred to RDR. The CPU cannot read or write RSR directly.
12.2.2
Receive Data Register (RDR)
RDR is the register that stores received serial data.
Bit
7
0
Initial value
Read/Write
R
When the SCI has received one byte of serial data, it transfers the received data from RSR into
RDR for storage, completing the receive operation. RSR is then ready to receive the next data.
This double-buffering allows data to be received continuously.
RDR is a read-only register. Its contents cannot be modified by the CPU. RDR is initialized to
H'00 by a reset and in standby mode.
362
7
6
—
—
6
0
R
5
4
—
—
5
4
0
0
R
R
3
2
—
—
3
2
0
0
R
R
1
0
—
—
0
1
0
0
R
R