15.1.2
Block Diagram
Figure 15.1 shows a block diagram of the SCI.
SCRDR1
RxD
SCRSR1
TxD
SCK
SCRSR1: Receive shift register
SCRDR1: Receive data register
SCTSR1:
Transmit shift register
SCTDR1:
Transmit data register
SCSMR1: Serial mode register
SCSCR1: Serial control register
SCSSR1:
Serial status register
SCBRR1: Bit rate register
SCSPTR1: Serial port register
Module data bus
SCTDR1
SCTSR1
Transmission/
reception
Parity generation
Parity check
Figure 15.1 Block Diagram of SCI
SCSSR1
SCBRR1
SCSCR1
SCSMR1
Baud rate
SCSPTR1
generator
control
Clock
External clock
SCI
Rev. 4.0, 04/00, page 505 of 850
Internal
data bus
Pφ
Pφ/4
Pφ/16
Pφ/64
TEI
TXI
RXI
ERI